PDK API Guide for J721S2: cslr_dss.h Source File

 /********************************************************************
  * Copyright (C) 2018-2019 Texas Instruments Incorporated.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
  *  are met:
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  *    notice, this list of conditions and the following disclaimer.
  *
  *    Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the
  *    distribution.
  *
  *    Neither the name of Texas Instruments Incorporated nor the names of
  *    its contributors may be used to endorse or promote products derived
  *    from this software without specific prior written permission.
  *
  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  *  Name        : cslr_dss.h
 */
 #ifndef CSLR_DSS_H_
 #define CSLR_DSS_H_

 #ifdef __cplusplus
 extern "C"
 {
 #endif
 #include <ti/csl/cslr.h>
 #include <stdint.h>

 /**************************************************************************
 * Hardware Region  : COMMON_M Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint8_t  Resv_4[4];
     volatile uint32_t DSS_REVISION;              /* DSS_REVISION */
     volatile uint32_t DSS_SYSCONFIG;             /* DSS_SYSCONFIG */
     volatile uint8_t  Resv_32[20];
     volatile uint32_t DSS_SYSSTATUS;             /* DSS_SYSSTATUS */
     volatile uint8_t  Resv_40[4];
     volatile uint32_t DISPC_IRQSTATUS_RAW;       /* DISPC_IRQSTATUS_RAW */
     volatile uint32_t DISPC_IRQSTATUS;           /* DISPC_IRQSTATUS */
     volatile uint32_t DISPC_IRQENABLE_SET;       /* DISPC_IRQENABLE_SET */
     volatile uint32_t DISPC_IRQENABLE_CLR;       /* DISPC_IRQENABLE_CLR */
     volatile uint32_t VID_IRQENABLE_0;           /* VID_IRQENABLE_0 */
     volatile uint32_t VID_IRQENABLE_1;           /* VID_IRQENABLE_1 */
     volatile uint32_t VID_IRQENABLE_2;           /* VID_IRQENABLE_2 */
     volatile uint32_t VID_IRQENABLE_3;           /* VID_IRQENABLE_3 */
     volatile uint32_t VID_IRQSTATUS_0;           /* VID_IRQSTATUS_0 */
     volatile uint32_t VID_IRQSTATUS_1;           /* VID_IRQSTATUS_1 */
     volatile uint32_t VID_IRQSTATUS_2;           /* VID_IRQSTATUS_2 */
     volatile uint32_t VID_IRQSTATUS_3;           /* VID_IRQSTATUS_3 */
     volatile uint32_t VP_IRQENABLE_0;            /* VP_IRQENABLE_0 */
     volatile uint32_t VP_IRQENABLE_1;            /* VP_IRQENABLE_1 */
     volatile uint32_t VP_IRQENABLE_2;            /* VP_IRQENABLE_2 */
     volatile uint32_t VP_IRQENABLE_3;            /* VP_IRQENABLE_3 */
     volatile uint32_t VP_IRQSTATUS_0;            /* VP_IRQSTATUS_0 */
     volatile uint32_t VP_IRQSTATUS_1;            /* VP_IRQSTATUS_1 */
     volatile uint32_t VP_IRQSTATUS_2;            /* VP_IRQSTATUS_2 */
     volatile uint32_t VP_IRQSTATUS_3;            /* VP_IRQSTATUS_3 */
     volatile uint32_t WB_IRQENABLE;              /* WB_IRQENABLE */
     volatile uint32_t WB_IRQSTATUS;              /* WB_IRQSTATUS */
     volatile uint32_t DISPC_IRQ_EOI_FUNC;        /* DISPC_IRQ_EOI_FUNC */
     volatile uint32_t DISPC_IRQ_EOI_SAFETY;      /* DISPC_IRQ_EOI_SAFETY */
     volatile uint32_t DISPC_IRQ_EOI_SECURITY;    /* DISPC_IRQ_EOI_SECURITY */
     volatile uint8_t  Resv_144[4];
     volatile uint32_t DISPC_SECURE_DISABLE;      /* DISPC_SECURE_DISABLE */
     volatile uint8_t  Resv_152[4];
     volatile uint32_t DISPC_GLOBAL_MFLAG_ATTRIBUTE;   /* DISPC_GLOBAL_MFLAG_ATTRIBUTE */
     volatile uint32_t DISPC_GLOBAL_OUTPUT_ENABLE;   /* DISPC_GLOBAL_OUTPUT_ENABLE */
     volatile uint32_t DISPC_GLOBAL_BUFFER;       /* DISPC_GLOBAL_BUFFER */
     volatile uint32_t DSS_CBA_CFG;               /* DSS_CBA_CFG */
     volatile uint32_t DISPC_DBG_CONTROL;         /* DISPC_DBG_CONTROL */
     volatile uint32_t DISPC_DBG_STATUS;          /* DISPC_DBG_STATUS */
     volatile uint32_t DISPC_CLKGATING_DISABLE;   /* DISPC_CLKGATING_DISABLE */
     volatile uint8_t  Resv_184[4];
     volatile uint32_t FBDC_REVISION_1;           /* FBDC_REVISION_1 */
     volatile uint32_t FBDC_REVISION_2;           /* FBDC_REVISION_2 */
     volatile uint32_t FBDC_REVISION_3;           /* FBDC_REVISION_3 */
     volatile uint32_t FBDC_REVISION_4;           /* FBDC_REVISION_4 */
     volatile uint32_t FBDC_REVISION_5;           /* FBDC_REVISION_5 */
     volatile uint32_t FBDC_REVISION_6;           /* FBDC_REVISION_6 */
     volatile uint32_t FBDC_COMMON_CONTROL;       /* FBDC_COMMON_CONTROL */
     volatile uint32_t FBDC_CONSTANT_COLOR_0;     /* FBDC_CONSTANT_COLOR_0 */
     volatile uint32_t FBDC_CONSTANT_COLOR_1;     /* FBDC_CONSTANT_COLOR_1 */
     volatile uint8_t  Resv_228[8];
     volatile uint32_t DISPC_CONNECTIONS;         /* DISPC_CONNECTIONS */
     volatile uint32_t DISPC_MSS_VP1;             /* DISPC_MERGESPLIT_VP1 */
     volatile uint32_t DISPC_MSS_VP3;             /* DISPC_MERGESPLIT_VP3 */
     volatile uint32_t GLOBAL_DMA_THREADSIZE;     /* DMA_THREADSIZE */
     volatile uint32_t GLOBAL_DMA_THREADSIZESTATUS;   /* DMA_THREADSIZESTATUS */
     volatile uint32_t GLOBAL_GOBITMODE;          /* GLOBAL_GOBITMODE */
 } CSL_dss_common_mRegs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_COMMON_M_DSS_REVISION                                          (0x00000004U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG                                         (0x00000008U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS                                         (0x00000020U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW                                   (0x00000028U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS                                       (0x0000002CU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET                                   (0x00000030U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR                                   (0x00000034U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0                                       (0x00000038U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1                                       (0x0000003CU)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2                                       (0x00000040U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3                                       (0x00000044U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0                                       (0x00000048U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1                                       (0x0000004CU)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2                                       (0x00000050U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3                                       (0x00000054U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0                                        (0x00000058U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1                                        (0x0000005CU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2                                        (0x00000060U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3                                        (0x00000064U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0                                        (0x00000068U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1                                        (0x0000006CU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2                                        (0x00000070U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3                                        (0x00000074U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE                                          (0x00000078U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS                                          (0x0000007CU)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC                                    (0x00000080U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY                                  (0x00000084U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY                                (0x00000088U)
 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE                                  (0x00000090U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE                          (0x00000098U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE                            (0x0000009CU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER                                   (0x000000A0U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG                                           (0x000000A4U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL                                     (0x000000A8U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_STATUS                                      (0x000000ACU)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE                               (0x000000B0U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_1                                       (0x000000B8U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_2                                       (0x000000BCU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_3                                       (0x000000C0U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_4                                       (0x000000C4U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_5                                       (0x000000C8U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_6                                       (0x000000CCU)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL                                   (0x000000D0U)
 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0                                 (0x000000D4U)
 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1                                 (0x000000D8U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS                                     (0x000000E4U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1                                         (0x000000E8U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3                                         (0x000000ECU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE                                 (0x000000F0U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS                           (0x000000F4U)
 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE                                      (0x000000F8U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* DSS_REVISION */

 #define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MASK                              (0x0000003FU)
 #define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_SHIFT                             (0x00000000U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MAX                               (0x0000003FU)

 #define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MASK                              (0x000000C0U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_SHIFT                             (0x00000006U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MAX                               (0x00000003U)

 #define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MASK                            (0x00000700U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_SHIFT                           (0x00000008U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MAX                             (0x00000007U)

 #define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MASK                              (0x0000F800U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_SHIFT                             (0x0000000BU)
 #define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MAX                               (0x0000001FU)

 #define CSL_DSS_COMMON_M_DSS_REVISION_MODID_MASK                               (0xFFFF0000U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_MODID_SHIFT                              (0x00000010U)
 #define CSL_DSS_COMMON_M_DSS_REVISION_MODID_MAX                                (0x0000FFFFU)

 /* DSS_SYSCONFIG */

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MASK                      (0x00000001U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKFREE               (0x0U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKGATED              (0x1U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MASK                          (0x00000002U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_SHIFT                         (0x00000001U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MASK                          (0x00000004U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_SHIFT                         (0x00000002U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MASK                           (0x00000018U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_SHIFT                          (0x00000003U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MAX                            (0x00000003U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MASK                          (0x00000020U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_SHIFT                         (0x00000005U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MASK                          (0x000000C0U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_SHIFT                         (0x00000006U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MAX                           (0x00000003U)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MASK                          (0x00003F00U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_SHIFT                         (0x00000008U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MAX                           (0x0000003FU)

 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MASK                          (0xFFFFC000U)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_SHIFT                         (0x0000000EU)
 #define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MAX                           (0x0003FFFFU)

 /* DSS_SYSSTATUS */

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MASK               (0x00000001U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_SHIFT              (0x00000000U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTONGOING     (0x0U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTCOMP        (0x1U)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MASK                 (0x0000001EU)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTONGOING       (0x0U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTCOMP          (0x1U)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MASK                          (0x000001E0U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_SHIFT                         (0x00000005U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MAX                           (0x0000000FU)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTONGOING                (0x0U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTCOMP                   (0x1U)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MASK                  (0x00000200U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_SHIFT                 (0x00000009U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_NOTIDLE           (0x0U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_IDLE              (0x1U)

 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MASK                          (0xFFFFFC00U)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_SHIFT                         (0x0000000AU)
 #define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MAX                           (0x003FFFFFU)

 /* DISPC_IRQSTATUS_RAW */

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK                       (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT                      (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX                        (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT              (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK                      (0x000000F0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT                     (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX                       (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK                 (0x00001F00U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT                (0x00000008U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX                  (0x0000001FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK                 (0x00002000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK                       (0x00004000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT                      (0x0000000EU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT              (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK                   (0x00008000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT                  (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT          (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK                    (0x00010000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT                   (0x00000010U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION            (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT           (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MASK                     (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT                    (0x00000011U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MAX                      (0x00007FFFU)

 /* DISPC_IRQSTATUS */

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MASK                           (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_SHIFT                          (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MAX                            (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION                   (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR                      (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MASK                          (0x000000F0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_SHIFT                         (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MAX                           (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MASK                     (0x00001F00U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_SHIFT                    (0x00000008U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MAX                      (0x0000001FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MASK                     (0x00002000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT                    (0x0000000DU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MASK                           (0x00004000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_SHIFT                          (0x0000000EU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MAX                            (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION                   (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR                      (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK                       (0x00008000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT                      (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR                  (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MASK                        (0x00010000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT                       (0x00000010U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION                (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR                   (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MAX                          (0x00007FFFU)

 /* DISPC_IRQENABLE_SET */

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK                   (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX                    (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE             (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK                  (0x000000F0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT                 (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MASK                 (0x00001F00U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT                (0x00000008U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MAX                  (0x0000001FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK                 (0x00002000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK                   (0x00004000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT                  (0x0000000EU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE             (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK               (0x00008000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT              (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE         (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK                (0x00010000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT               (0x00000010U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION        (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE          (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MASK                     (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_SHIFT                    (0x00000011U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MAX                      (0x00007FFFU)

 /* DISPC_IRQENABLE_CLR */

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK                   (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX                    (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR              (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK                  (0x000000F0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT                 (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK                 (0x00001F00U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT                (0x00000008U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX                  (0x0000001FU)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK                 (0x00002000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK                   (0x00004000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT                  (0x0000000EU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR              (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK               (0x00008000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT              (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR          (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK                (0x00010000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT               (0x00000010U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION        (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR           (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MASK                     (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_SHIFT                    (0x00000011U)
 #define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MAX                      (0x00007FFFU)

 /* VID_IRQENABLE_0 */

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK            (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT           (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED      (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT                 (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK           (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT          (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQENABLE_1 */

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK            (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT           (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED      (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT                 (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK           (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT          (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQENABLE_2 */

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK            (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT           (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED      (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT                 (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK           (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT          (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQENABLE_3 */

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK            (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT           (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED      (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT                 (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK           (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT          (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND       (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND       (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND       (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MAX                          (0x07FFFFFFU)

 /* VID_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND     (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND       (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MASK                         (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_SHIFT                        (0x00000005U)
 #define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MAX                          (0x07FFFFFFU)

 /* VP_IRQENABLE_0 */

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK                    (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT                   (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK                        (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT                       (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK         (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT        (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK                     (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK              (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT             (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MASK                   (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT                  (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MAX                    (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK              (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT             (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK                         (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_SHIFT                        (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MASK                          (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_SHIFT                         (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK                  (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT                 (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQENABLE_1 */

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK                    (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT                   (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MASK                        (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT                       (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK         (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT        (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK                     (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK              (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT             (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MASK                   (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT                  (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MAX                    (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK              (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT             (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MASK                         (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_SHIFT                        (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MASK                          (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_SHIFT                         (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK                  (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT                 (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQENABLE_2 */

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK                    (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT                   (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MASK                        (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT                       (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK         (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT        (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK                     (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK              (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT             (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MASK                   (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT                  (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MAX                    (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK              (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT             (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MASK                         (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_SHIFT                        (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MASK                          (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_SHIFT                         (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK                  (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT                 (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQENABLE_3 */

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK                    (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT                   (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MASK                        (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT                       (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK         (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT        (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK                     (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK              (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT             (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MASK                   (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT                  (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MAX                    (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK              (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT             (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED        (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT        (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MASK                         (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_SHIFT                        (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MASK                          (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_SHIFT                         (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK                  (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT                 (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MAX                           (0x00007FFFU)

 /* VP_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND       (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND         (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MASK                          (0xFFFE0000U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_SHIFT                         (0x00000011U)
 #define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MAX                           (0x00007FFFU)

 /* WB_IRQENABLE */

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK                 (0x00000001U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT                (0x00000000U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED          (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT          (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK                      (0x00000004U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT                     (0x00000002U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED                (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT                (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK                (0x00000008U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT               (0x00000003U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED          (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT          (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK                           (0x00000010U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_SHIFT                          (0x00000004U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MAX                            (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED                     (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT                     (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MASK                            (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_SHIFT                           (0x00000005U)
 #define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MAX                             (0x07FFFFFFU)

 /* WB_IRQSTATUS */

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK                (0x00000001U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT               (0x00000000U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK               (0x00000002U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT              (0x00000001U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND         (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND           (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK                     (0x00000004U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT                    (0x00000002U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND               (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND                 (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK               (0x00000008U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT              (0x00000003U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND         (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND           (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MASK                          (0x00000010U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT                         (0x00000004U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND                    (0x0U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND                      (0x1U)

 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MASK                            (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_SHIFT                           (0x00000005U)
 #define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MAX                             (0x07FFFFFFU)

 /* DISPC_IRQ_EOI_FUNC */

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MASK                           (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_SHIFT                          (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MAX                            (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION                   (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI                        (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MASK                      (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MAX                       (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SAFETY */

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MASK                         (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT                        (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION                 (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI                      (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK                    (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT                   (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX                     (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SECURITY */

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MASK                       (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT                      (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI                    (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK                  (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT                 (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX                   (0x7FFFFFFFU)

 /* DISPC_SECURE_DISABLE */

 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MASK              (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_SHIFT             (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREEN      (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREDIS     (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MASK                    (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_SHIFT                   (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MAX                     (0x7FFFFFFFU)

 /* DISPC_GLOBAL_MFLAG_ATTRIBUTE */

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MASK          (0x00000003U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MAX           (0x00000003U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS  (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN   (0x2U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MASK           (0x0000003CU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_SHIFT          (0x00000002U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MAX            (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MASK         (0x00000040U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_SHIFT        (0x00000006U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MASK           (0x00000180U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_SHIFT          (0x00000007U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MAX            (0x00000003U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MASK            (0xFFFFFE00U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_SHIFT           (0x00000009U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MAX             (0x007FFFFFU)

 /* DISPC_GLOBAL_OUTPUT_ENABLE */

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MASK             (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_SHIFT            (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MAX              (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_DISABLE      (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_ENABLE       (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MASK             (0x0000FFF0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_SHIFT            (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MAX              (0x00000FFFU)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MASK                 (0x000F0000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_SHIFT                (0x00000010U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_HFUISR           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_UFPSR            (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MASK             (0xFFF00000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_SHIFT            (0x00000014U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MAX              (0x00000FFFU)

 /* DISPC_GLOBAL_BUFFER */

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MASK                  (0x00000007U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MAX                   (0x00000007U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID1              (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL1             (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID2              (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL2             (0x3U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_WB                (0x4U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MASK                 (0x00000038U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_SHIFT                (0x00000003U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MAX                  (0x00000007U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID1             (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL1            (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID2             (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL2            (0x3U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_WB               (0x4U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MASK                  (0x000001C0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MAX                   (0x00000007U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID1              (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL1             (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID2              (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL2             (0x3U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_WB                (0x4U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MASK                 (0x00000E00U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_SHIFT                (0x00000009U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MAX                  (0x00000007U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID1             (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL1            (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID2             (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL2            (0x3U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_WB               (0x4U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MASK                    (0x00007000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_SHIFT                   (0x0000000CU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MAX                     (0x00000007U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID1                (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL1               (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID2                (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL2               (0x3U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_WB                  (0x4U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MASK                     (0x1FFF8000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_SHIFT                    (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MAX                      (0x00003FFFU)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MASK                    (0x20000000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_SHIFT                   (0x0000001DU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MASK              (0x40000000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_SHIFT             (0x0000001EU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_DISABLE       (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_ENABLE        (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MASK                (0x80000000U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_SHIFT               (0x0000001FU)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_INDIVIDUALPIPE  (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_ALLPIPES        (0x1U)

 /* DSS_CBA_CFG */

 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MASK                               (0x00000007U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_SHIFT                              (0x00000000U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MAX                                (0x00000007U)

 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MASK                               (0x00000038U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_SHIFT                              (0x00000003U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MAX                                (0x00000007U)

 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MASK            (0x00000040U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_SHIFT           (0x00000006U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MASK        (0x00000180U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_SHIFT       (0x00000007U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MAX         (0x00000003U)

 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MASK                             (0xFFFFFE00U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_SHIFT                            (0x00000009U)
 #define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MAX                              (0x007FFFFFU)

 /* DISPC_DBG_CONTROL */

 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MASK                          (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGDIS                    (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGEN                     (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MASK                      (0x000001FEU)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MAX                       (0x000000FFU)

 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID1SEL               (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL1SEL              (0x8U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID2SEL               (0x10U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL2SEL              (0x18U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_WBSEL                 (0x20U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR1SEL               (0x21U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR2SEL               (0x22U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR3SEL               (0x23U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR4SEL               (0x24U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP1SEL                (0x25U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP2SEL                (0x27U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP3SEL                (0x29U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP4SEL                (0x2BU)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_MISCSEL               (0x2DU)

 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MASK                       (0xFFFFFE00U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_SHIFT                      (0x00000009U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MAX                        (0x007FFFFFU)

 /* DISPC_DBG_STATUS */

 #define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MASK                          (0xFFFFFFFFU)
 #define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MAX                           (0xFFFFFFFFU)

 /* DISPC_CLKGATING_DISABLE */

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MASK                      (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGEN           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGDIS          (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MASK                (0x00000006U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MAX                 (0x00000003U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MASK                      (0x00000078U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_SHIFT                     (0x00000003U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MAX                       (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGEN           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGDIS          (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MASK                (0x00000F80U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_SHIFT               (0x00000007U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MASK                (0x00001000U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_SHIFT               (0x0000000CU)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MASK                       (0x00002000U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_SHIFT                      (0x0000000DU)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGEN            (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGDIS           (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MASK                      (0x0003C000U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_SHIFT                     (0x0000000EU)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MAX                       (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGEN           (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGDIS          (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MASK                       (0x003C0000U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_SHIFT                      (0x00000012U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MAX                        (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGEN            (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGDIS           (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MASK                 (0xFFC00000U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_SHIFT                (0x00000016U)
 #define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MAX                  (0x000003FFU)

 /* FBDC_REVISION_1 */

 #define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MASK                      (0x0000FFFFU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MAX                       (0x0000FFFFU)

 #define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MASK                         (0xFFFF0000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_SHIFT                        (0x00000010U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MAX                          (0x0000FFFFU)

 /* FBDC_REVISION_2 */

 #define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MASK                       (0x0000FFFFU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_SHIFT                      (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MAX                        (0x0000FFFFU)

 #define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MASK                         (0xFFFF0000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_SHIFT                        (0x00000010U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MAX                          (0x0000FFFFU)

 /* FBDC_REVISION_3 */

 #define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MASK                      (0x0000FFFFU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MAX                       (0x0000FFFFU)

 #define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MASK                         (0xFFFF0000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_SHIFT                        (0x00000010U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MAX                          (0x0000FFFFU)

 /* FBDC_REVISION_4 */

 #define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MASK                         (0x0000FFFFU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_SHIFT                        (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MAX                          (0x0000FFFFU)

 #define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MASK                         (0xFFFF0000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_SHIFT                        (0x00000010U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MAX                          (0x0000FFFFU)

 /* FBDC_REVISION_5 */

 #define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MASK                       (0x0000FFFFU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_SHIFT                      (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MAX                        (0x0000FFFFU)

 #define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MASK                         (0xFFFF0000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_SHIFT                        (0x00000010U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MAX                          (0x0000FFFFU)

 /* FBDC_REVISION_6 */

 #define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MASK                   (0xFFFFFFFFU)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MAX                    (0xFFFFFFFFU)

 /* FBDC_COMMON_CONTROL */

 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MASK                     (0x00000001U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_SHIFT                    (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MASK                      (0x00000004U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_SHIFT                     (0x00000002U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XE                   (0x0U)
 #define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XT                   (0x1U)

 /* FBDC_CONSTANT_COLOR_0 */

 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MASK                 (0xFFFFFFFFU)
 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_SHIFT                (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MAX                  (0xFFFFFFFFU)

 /* FBDC_CONSTANT_COLOR_1 */

 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MASK                 (0xFFFFFFFFU)
 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_SHIFT                (0x00000000U)
 #define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MAX                  (0xFFFFFFFFU)

 /* DISPC_CONNECTIONS */

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MASK                     (0x0000000FU)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_SHIFT                    (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MAX                      (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_NULL                 (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP1                  (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP2                  (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP3                  (0x4U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP4                  (0x8U)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MASK                     (0x000000F0U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MAX                      (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_NULL                 (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP1                  (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP2                  (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP3                  (0x4U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP4                  (0x8U)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MASK                        (0x001F0000U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_SHIFT                       (0x00000010U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MAX                         (0x0000001FU)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL                    (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2                   (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1                    (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2                    (0x4U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3                    (0x8U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4                    (0x10U)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MASK                 (0x0F000000U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_SHIFT                (0x00000018U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_NULL             (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP1              (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP2              (0x2U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP3              (0x4U)
 #define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP4              (0x8U)

 /* DISPC_MSS_VP1 */

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MASK                          (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSBYPASS                 (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSENABLE                 (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MASK                            (0x00000006U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_SHIFT                           (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MAX                             (0x00000003U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_MERGEENB                    (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SPLITENB                    (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SYNCENB                     (0x2U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MASK                          (0x00000008U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_SHIFT                         (0x00000003U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_OE                        (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_LR                        (0x0U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MASK                           (0xFFFFFFF0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_SHIFT                          (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MAX                            (0x0FFFFFFFU)

 /* DISPC_MSS_VP3 */

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MASK                          (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSBYPASS                 (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSENABLE                 (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MASK                            (0x00000006U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_SHIFT                           (0x00000001U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MAX                             (0x00000003U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_MERGEENB                    (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SPLITENB                    (0x1U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SYNCENB                     (0x2U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MASK                          (0x00000008U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_SHIFT                         (0x00000003U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_OE                        (0x0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_LR                        (0x1U)

 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MASK                           (0xFFFFFFF0U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_SHIFT                          (0x00000004U)
 #define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MAX                            (0x0FFFFFFFU)

 /* GLOBAL_DMA_THREADSIZE */

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MASK              (0x0000001FU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_SHIFT             (0x00000000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MAX               (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MASK              (0x000003E0U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_SHIFT             (0x00000005U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MAX               (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MASK              (0x00007C00U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_SHIFT             (0x0000000AU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MAX               (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MASK              (0x000F8000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MAX               (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MASK               (0x01F00000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_SHIFT              (0x00000014U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MAX                (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MASK                   (0xFE000000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_SHIFT                  (0x00000019U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MAX                    (0x0000007FU)

 /* GLOBAL_DMA_THREADSIZESTATUS */

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MASK        (0x0000001FU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_SHIFT       (0x00000000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MAX         (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MASK        (0x000003E0U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_SHIFT       (0x00000005U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MAX         (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MASK        (0x00007C00U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_SHIFT       (0x0000000AU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MAX         (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MASK        (0x000F8000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_SHIFT       (0x0000000FU)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MAX         (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MASK         (0x01F00000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_SHIFT        (0x00000014U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MAX          (0x0000001FU)

 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MASK             (0xFE000000U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_SHIFT            (0x00000019U)
 #define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MAX              (0x0000007FU)

 /* GLOBAL_GOBITMODE */

 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MASK                            (0x00000001U)
 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_SHIFT                           (0x00000000U)
 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MAX                             (0x00000001U)

 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGODIS                   (0x0U)
 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGOEN                    (0x1U)

 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MASK                        (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_SHIFT                       (0x00000001U)
 #define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MAX                         (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : COMMON_S0 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint8_t  Resv_40[40];
     volatile uint32_t DISPC_IRQSTATUS_RAW;       /* DISPC_IRQSTATUS_RAW */
     volatile uint32_t DISPC_IRQSTATUS;           /* DISPC_IRQSTATUS */
     volatile uint32_t DISPC_IRQENABLE_SET;       /* DISPC_IRQENABLE_SET */
     volatile uint32_t DISPC_IRQENABLE_CLR;       /* DISPC_IRQENABLE_CLR */
     volatile uint32_t VID_IRQENABLE_0;           /* VID_IRQENABLE_0 */
     volatile uint32_t VID_IRQENABLE_1;           /* VID_IRQENABLE_1 */
     volatile uint32_t VID_IRQENABLE_2;           /* VID_IRQENABLE_2 */
     volatile uint32_t VID_IRQENABLE_3;           /* VID_IRQENABLE_3 */
     volatile uint32_t VID_IRQSTATUS_0;           /* VID_IRQSTATUS_0 */
     volatile uint32_t VID_IRQSTATUS_1;           /* VID_IRQSTATUS_1 */
     volatile uint32_t VID_IRQSTATUS_2;           /* VID_IRQSTATUS_2 */
     volatile uint32_t VID_IRQSTATUS_3;           /* VID_IRQSTATUS_3 */
     volatile uint32_t VP_IRQENABLE_0;            /* VP_IRQENABLE_0 */
     volatile uint32_t VP_IRQENABLE_1;            /* VP_IRQENABLE_1 */
     volatile uint32_t VP_IRQENABLE_2;            /* VP_IRQENABLE_2 */
     volatile uint32_t VP_IRQENABLE_3;            /* VP_IRQENABLE_3 */
     volatile uint32_t VP_IRQSTATUS_0;            /* VP_IRQSTATUS_0 */
     volatile uint32_t VP_IRQSTATUS_1;            /* VP_IRQSTATUS_1 */
     volatile uint32_t VP_IRQSTATUS_2;            /* VP_IRQSTATUS_2 */
     volatile uint32_t VP_IRQSTATUS_3;            /* VP_IRQSTATUS_3 */
     volatile uint32_t WB_IRQENABLE;              /* WB_IRQENABLE */
     volatile uint32_t WB_IRQSTATUS;              /* WB_IRQSTATUS */
     volatile uint32_t DISPC_IRQ_EOI_FUNC;        /* DISPC_IRQ_EOI_FUNC */
     volatile uint32_t DISPC_IRQ_EOI_SAFETY;      /* DISPC_IRQ_EOI_SAFETY */
     volatile uint32_t DISPC_IRQ_EOI_SECURITY;    /* DISPC_IRQ_EOI_SECURITY */
 } CSL_dss_common_s0Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW                                  (0x00000028U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS                                      (0x0000002CU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET                                  (0x00000030U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR                                  (0x00000034U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0                                      (0x00000038U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1                                      (0x0000003CU)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2                                      (0x00000040U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3                                      (0x00000044U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0                                      (0x00000048U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1                                      (0x0000004CU)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2                                      (0x00000050U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3                                      (0x00000054U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0                                       (0x00000058U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1                                       (0x0000005CU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2                                       (0x00000060U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3                                       (0x00000064U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0                                       (0x00000068U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1                                       (0x0000006CU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2                                       (0x00000070U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3                                       (0x00000074U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE                                         (0x00000078U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS                                         (0x0000007CU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC                                   (0x00000080U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY                                 (0x00000084U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY                               (0x00000088U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* DISPC_IRQSTATUS_RAW */

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK                      (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX                       (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK                     (0x000000F0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX                      (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION             (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT            (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK                      (0x00004000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT                     (0x0000000EU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK                  (0x00008000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT                 (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT         (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK                   (0x00010000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT                  (0x00000010U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT          (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MAX                     (0x00007FFFU)

 /* DISPC_IRQSTATUS */

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MASK                          (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MAX                           (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MASK                         (0x000000F0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_SHIFT                        (0x00000004U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MAX                          (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION                 (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR                    (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MASK                    (0x00001F00U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_SHIFT                   (0x00000008U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MAX                     (0x0000001FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MASK                    (0x00002000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT                   (0x0000000DU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MASK                          (0x00004000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_SHIFT                         (0x0000000EU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK                      (0x00008000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT                     (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR                 (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MASK                       (0x00010000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT                      (0x00000010U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR                  (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MASK                        (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_SHIFT                       (0x00000011U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MAX                         (0x00007FFFU)

 /* DISPC_IRQENABLE_SET */

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK                  (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK                 (0x000000F0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT                (0x00000004U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION         (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE           (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK                  (0x00004000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT                 (0x0000000EU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK              (0x00008000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION      (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE        (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK               (0x00010000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT              (0x00000010U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE         (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MAX                     (0x00007FFFU)

 /* DISPC_IRQENABLE_CLR */

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK                  (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK                 (0x000000F0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT                (0x00000004U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION         (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR            (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK                  (0x00004000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT                 (0x0000000EU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK              (0x00008000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION      (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR         (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK               (0x00010000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT              (0x00000010U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR          (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MAX                     (0x00007FFFU)

 /* VID_IRQENABLE_0 */

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_1 */

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_2 */

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_3 */

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MAX                         (0x07FFFFFFU)

 /* VP_IRQENABLE_0 */

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_1 */

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_2 */

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_3 */

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MAX                          (0x00007FFFU)

 /* WB_IRQENABLE */

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK                (0x00000001U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT               (0x00000000U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED          (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT          (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK               (0x00000002U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT              (0x00000001U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED         (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT         (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MASK                     (0x00000004U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT                    (0x00000002U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK               (0x00000008U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT              (0x00000003U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED         (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT         (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MASK                          (0x00000010U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_SHIFT                         (0x00000004U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MASK                           (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_SHIFT                          (0x00000005U)
 #define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MAX                            (0x07FFFFFFU)

 /* WB_IRQSTATUS */

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK               (0x00000001U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT              (0x00000000U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND         (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND           (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK              (0x00000002U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT             (0x00000001U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND        (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND          (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND        (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND          (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MASK                         (0x00000010U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT                        (0x00000004U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MASK                           (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_SHIFT                          (0x00000005U)
 #define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MAX                            (0x07FFFFFFU)

 /* DISPC_IRQ_EOI_FUNC */

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MASK                          (0x00000001U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI                       (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MASK                     (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT                    (0x00000001U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MAX                      (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SAFETY */

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MASK                        (0x00000001U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT                       (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION                (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI                     (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK                   (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT                  (0x00000001U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX                    (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SECURITY */

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MASK                      (0x00000001U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI                   (0x1U)

 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK                 (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX                  (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VIDL1 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint8_t  Resv_32[32];
     volatile uint32_t ATTRIBUTES;                /* ATTRIBUTES */
     volatile uint32_t ATTRIBUTES2;               /* ATTRIBUTES2 */
     volatile uint32_t BA_0;                      /* BA_0 */
     volatile uint32_t BA_1;                      /* BA_1 */
     volatile uint32_t BA_UV_0;                   /* BA_UV_0 */
     volatile uint32_t BA_UV_1;                   /* BA_UV_1 */
     volatile uint32_t BUF_SIZE_STATUS;           /* BUF_SIZE_STATUS */
     volatile uint32_t BUF_THRESHOLD;             /* BUF_THRESHOLD */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint8_t  Resv_508[416];
     volatile uint32_t GLOBAL_ALPHA;              /* GLOBAL_ALPHA */
     volatile uint8_t  Resv_520[8];
     volatile uint32_t MFLAG_THRESHOLD;           /* MFLAG_THRESHOLD */
     volatile uint32_t PICTURE_SIZE;              /* PICTURE_SIZE */
     volatile uint32_t PIXEL_INC;                 /* PIXEL_INC */
     volatile uint8_t  Resv_536[4];
     volatile uint32_t PRELOAD;                   /* PRELOAD */
     volatile uint32_t ROW_INC;                   /* ROW_INC */
     volatile uint8_t  Resv_556[12];
     volatile uint32_t BA_EXT_0;                  /* BA_EXT_0 */
     volatile uint32_t BA_EXT_1;                  /* BA_EXT_1 */
     volatile uint32_t BA_UV_EXT_0;               /* BA_UV_EXT_0 */
     volatile uint32_t BA_UV_EXT_1;               /* BA_UV_EXT_1 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint8_t  Resv_584[8];
     volatile uint32_t ROW_INC_UV;                /* ROW_INC_UV */
     volatile uint32_t TILE;                      /* TILE */
     volatile uint32_t TILE2;                     /* TILE2 */
     volatile uint32_t FBDC_ATTRIBUTES;           /* FBDC_ATTRIBUTES */
     volatile uint32_t FBDC_CLEAR_COLOR;          /* FBDC_CLEAR_COLOR */
     volatile uint8_t  Resv_608[4];
     volatile uint32_t CLUT_0;                    /* CLUT_0 */
     volatile uint32_t CLUT_1;                    /* CLUT_1 */
     volatile uint32_t CLUT_2;                    /* CLUT_2 */
     volatile uint32_t CLUT_3;                    /* CLUT_3 */
     volatile uint32_t CLUT_4;                    /* CLUT_4 */
     volatile uint32_t CLUT_5;                    /* CLUT_5 */
     volatile uint32_t CLUT_6;                    /* CLUT_6 */
     volatile uint32_t CLUT_7;                    /* CLUT_7 */
     volatile uint32_t CLUT_8;                    /* CLUT_8 */
     volatile uint32_t CLUT_9;                    /* CLUT_9 */
     volatile uint32_t CLUT_10;                   /* CLUT_10 */
     volatile uint32_t CLUT_11;                   /* CLUT_11 */
     volatile uint32_t CLUT_12;                   /* CLUT_12 */
     volatile uint32_t CLUT_13;                   /* CLUT_13 */
     volatile uint32_t CLUT_14;                   /* CLUT_14 */
     volatile uint32_t CLUT_15;                   /* CLUT_15 */
     volatile uint32_t SAFETY_ATTRIBUTES;         /* SAFETY_ATTRIBUTES */
     volatile uint32_t SAFETY_CAPT_SIGNATURE;     /* SAFETY_CAPT_SIGNATURE */
     volatile uint32_t SAFETY_POSITION;           /* SAFETY_POSITION */
     volatile uint32_t SAFETY_REF_SIGNATURE;      /* SAFETY_REF_SIGNATURE */
     volatile uint32_t SAFETY_SIZE;               /* SAFETY_SIZE */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint32_t LUMAKEY;                   /* LUMAKEY */
     volatile uint32_t DMA_BUFSIZE;               /* DMA_BUFSIZE */
     volatile uint32_t CROP;                      /* CROP */
     volatile uint32_t SECURE;                    /* SECURE */
     volatile uint32_t PIPE_GO;                   /* PIPE_GO */
 } CSL_dss_vidl1Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VIDL1_ATTRIBUTES                                               (0x00000020U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2                                              (0x00000024U)
 #define CSL_DSS_VIDL1_BA_0                                                     (0x00000028U)
 #define CSL_DSS_VIDL1_BA_1                                                     (0x0000002CU)
 #define CSL_DSS_VIDL1_BA_UV_0                                                  (0x00000030U)
 #define CSL_DSS_VIDL1_BA_UV_1                                                  (0x00000034U)
 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS                                          (0x00000038U)
 #define CSL_DSS_VIDL1_BUF_THRESHOLD                                            (0x0000003CU)
 #define CSL_DSS_VIDL1_CSC_COEF0                                                (0x00000040U)
 #define CSL_DSS_VIDL1_CSC_COEF1                                                (0x00000044U)
 #define CSL_DSS_VIDL1_CSC_COEF2                                                (0x00000048U)
 #define CSL_DSS_VIDL1_CSC_COEF3                                                (0x0000004CU)
 #define CSL_DSS_VIDL1_CSC_COEF4                                                (0x00000050U)
 #define CSL_DSS_VIDL1_CSC_COEF5                                                (0x00000054U)
 #define CSL_DSS_VIDL1_CSC_COEF6                                                (0x00000058U)
 #define CSL_DSS_VIDL1_GLOBAL_ALPHA                                             (0x000001FCU)
 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD                                          (0x00000208U)
 #define CSL_DSS_VIDL1_PICTURE_SIZE                                             (0x0000020CU)
 #define CSL_DSS_VIDL1_PIXEL_INC                                                (0x00000210U)
 #define CSL_DSS_VIDL1_PRELOAD                                                  (0x00000218U)
 #define CSL_DSS_VIDL1_ROW_INC                                                  (0x0000021CU)
 #define CSL_DSS_VIDL1_BA_EXT_0                                                 (0x0000022CU)
 #define CSL_DSS_VIDL1_BA_EXT_1                                                 (0x00000230U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_0                                              (0x00000234U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_1                                              (0x00000238U)
 #define CSL_DSS_VIDL1_CSC_COEF7                                                (0x0000023CU)
 #define CSL_DSS_VIDL1_ROW_INC_UV                                               (0x00000248U)
 #define CSL_DSS_VIDL1_TILE                                                     (0x0000024CU)
 #define CSL_DSS_VIDL1_TILE2                                                    (0x00000250U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES                                          (0x00000254U)
 #define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR                                         (0x00000258U)
 #define CSL_DSS_VIDL1_CLUT_0                                                   (0x00000260U)
 #define CSL_DSS_VIDL1_CLUT_1                                                   (0x00000264U)
 #define CSL_DSS_VIDL1_CLUT_2                                                   (0x00000268U)
 #define CSL_DSS_VIDL1_CLUT_3                                                   (0x0000026CU)
 #define CSL_DSS_VIDL1_CLUT_4                                                   (0x00000270U)
 #define CSL_DSS_VIDL1_CLUT_5                                                   (0x00000274U)
 #define CSL_DSS_VIDL1_CLUT_6                                                   (0x00000278U)
 #define CSL_DSS_VIDL1_CLUT_7                                                   (0x0000027CU)
 #define CSL_DSS_VIDL1_CLUT_8                                                   (0x00000280U)
 #define CSL_DSS_VIDL1_CLUT_9                                                   (0x00000284U)
 #define CSL_DSS_VIDL1_CLUT_10                                                  (0x00000288U)
 #define CSL_DSS_VIDL1_CLUT_11                                                  (0x0000028CU)
 #define CSL_DSS_VIDL1_CLUT_12                                                  (0x00000290U)
 #define CSL_DSS_VIDL1_CLUT_13                                                  (0x00000294U)
 #define CSL_DSS_VIDL1_CLUT_14                                                  (0x00000298U)
 #define CSL_DSS_VIDL1_CLUT_15                                                  (0x0000029CU)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES                                        (0x000002A0U)
 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE                                    (0x000002A4U)
 #define CSL_DSS_VIDL1_SAFETY_POSITION                                          (0x000002A8U)
 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE                                     (0x000002ACU)
 #define CSL_DSS_VIDL1_SAFETY_SIZE                                              (0x000002B0U)
 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED                                         (0x000002B4U)
 #define CSL_DSS_VIDL1_LUMAKEY                                                  (0x000002B8U)
 #define CSL_DSS_VIDL1_DMA_BUFSIZE                                              (0x000002BCU)
 #define CSL_DSS_VIDL1_CROP                                                     (0x000002C0U)
 #define CSL_DSS_VIDL1_SECURE                                                   (0x000002C4U)
 #define CSL_DSS_VIDL1_PIPE_GO                                                  (0x000002C8U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* ATTRIBUTES */

 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MASK                                   (0x00000001U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MAX                                    (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEOENB                           (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEODIS                           (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MASK                                   (0x0000007EU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_SHIFT                                  (0x00000001U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MAX                                    (0x0000003FU)

 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444                        (0x0U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444                        (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444                        (0x2U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB16_565                          (0x3U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR16_565                          (0x4U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555                        (0x5U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555                        (0x6U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888                        (0x7U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888                        (0x8U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888                        (0x9U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888                        (0xAU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB24P_888                         (0xBU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR24P_888                         (0xCU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010                     (0xEU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010                     (0xFU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616                    (0x10U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616                    (0x11U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP1                            (0x12U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP2                            (0x13U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP4                            (0x14U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP8                            (0x15U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB565A8                           (0x16U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR565A8                           (0x17U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444                        (0x20U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444                        (0x21U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444                        (0x22U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555                        (0x25U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555                        (0x26U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888                        (0x27U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888                        (0x28U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888                        (0x29U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888                        (0x2AU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010                     (0x2EU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010                     (0x2FU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616                    (0x30U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616                    (0x31U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12                        (0x3CU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12                        (0x3DU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2                        (0x3EU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY                        (0x3FU)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MASK                                (0x00000180U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_SHIFT                               (0x00000007U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MAX                                 (0x00000003U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MASK                          (0x00000200U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_SHIFT                         (0x00000009U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MAX                           (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB                 (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS                 (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MASK                               (0x00000400U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_SHIFT                              (0x0000000AU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN                   (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS                  (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MASK                                (0x00000800U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE                       (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE                        (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MASK                                     (0x00001000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MAX                                      (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_FLIP                                 (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_NOFLIP                               (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_CROP_MASK                                     (0x00002000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_CROP_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_CROP_MAX                                      (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPEN                               (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPDIS                              (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MASK                                (0x0001C000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_SHIFT                               (0x0000000EU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MAX                                 (0x00000007U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MASK                          (0x00020000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT                         (0x00000011U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MAX                           (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN         (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS        (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MASK                                (0x00040000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_SHIFT                               (0x00000012U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MASK                               (0x00080000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_SHIFT                              (0x00000013U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES                      (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL                         (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MASK                                (0x00100000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MASK                                (0x00200000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_SHIFT                               (0x00000015U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MASK                                (0x00400000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_SHIFT                               (0x00000016U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MASK                              (0x00800000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_SHIFT                             (0x00000017U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MAX                               (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO                      (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO                    (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MASK                              (0x01000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_SHIFT                             (0x00000018U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MAX                               (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB                (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS                (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MASK                                (0x0E000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_SHIFT                               (0x00000019U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MAX                                 (0x00000007U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MASK                         (0x10000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT                        (0x0000001CU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MAX                          (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA       (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA    (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK                        (0x20000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT                       (0x0000001DU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX                         (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER               (0x0U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER              (0x1U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MASK                           (0x40000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_SHIFT                          (0x0000001EU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MAX                            (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN                 (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS                (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MASK                            (0x80000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_SHIFT                           (0x0000001FU)
 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MAX                             (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN                   (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS                  (0x0U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MASK                               (0x00000001U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB                         (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS                         (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MASK                             (0x0000000EU)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT                            (0x00000001U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MAX                              (0x00000007U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK                          (0x00000070U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT                         (0x00000004U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX                           (0x00000007U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MASK                                (0x00000180U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_SHIFT                               (0x00000007U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MAX                                 (0x00000003U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_8B                              (0x0U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_10B                             (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_12B                             (0x2U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MASK                                (0x00000200U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_SHIFT                               (0x00000009U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_PACKED                          (0x0U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED                        (0x1U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MASK                               (0x00000400U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_SHIFT                              (0x0000000AU)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB                            (0x1U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB                            (0x0U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MASK                               (0x01F00000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_SHIFT                              (0x00000014U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MASK                                (0x02000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_SHIFT                               (0x00000019U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY                         (0x0U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY                       (0x1U)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MASK                                    (0x7C000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_SHIFT                                   (0x0000001AU)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MAX                                     (0x0000001FU)

 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MASK                               (0x80000000U)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_SHIFT                              (0x0000001FU)
 #define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MAX                                (0x00000001U)

 /* BA_0 */

 #define CSL_DSS_VIDL1_BA_0_BA_MASK                                             (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_BA_0_BA_SHIFT                                            (0x00000000U)
 #define CSL_DSS_VIDL1_BA_0_BA_MAX                                              (0xFFFFFFFFU)

 /* BA_1 */

 #define CSL_DSS_VIDL1_BA_1_BA_MASK                                             (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_BA_1_BA_SHIFT                                            (0x00000000U)
 #define CSL_DSS_VIDL1_BA_1_BA_MAX                                              (0xFFFFFFFFU)

 /* BA_UV_0 */

 #define CSL_DSS_VIDL1_BA_UV_0_BA_MASK                                          (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_BA_UV_0_BA_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VIDL1_BA_UV_0_BA_MAX                                           (0xFFFFFFFFU)

 /* BA_UV_1 */

 #define CSL_DSS_VIDL1_BA_UV_1_BA_MASK                                          (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_BA_UV_1_BA_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VIDL1_BA_UV_1_BA_MAX                                           (0xFFFFFFFFU)

 /* BUF_SIZE_STATUS */

 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MASK                             (0x0000FFFFU)
 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_SHIFT                            (0x00000000U)
 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MAX                              (0x0000FFFFU)

 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MASK                         (0xFFFF0000U)
 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_SHIFT                        (0x00000010U)
 #define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MAX                          (0x0000FFFFU)

 /* BUF_THRESHOLD */

 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK                       (0x0000FFFFU)
 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT                      (0x00000000U)
 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX                        (0x0000FFFFU)

 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK                      (0xFFFF0000U)
 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT                     (0x00000010U)
 #define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX                       (0x0000FFFFU)

 /* CSC_COEF0 */

 #define CSL_DSS_VIDL1_CSC_COEF0_C00_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL1_CSC_COEF0_C00_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF0_C00_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL1_CSC_COEF0_C01_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL1_CSC_COEF0_C01_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF0_C01_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MAX                                (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VIDL1_CSC_COEF1_C02_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL1_CSC_COEF1_C02_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF1_C02_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL1_CSC_COEF1_C10_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL1_CSC_COEF1_C10_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF1_C10_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MAX                                (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VIDL1_CSC_COEF2_C11_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL1_CSC_COEF2_C11_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF2_C11_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL1_CSC_COEF2_C12_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL1_CSC_COEF2_C12_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF2_C12_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MAX                                (0x0000001FU)

 /* CSC_COEF3 */

 #define CSL_DSS_VIDL1_CSC_COEF3_C20_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL1_CSC_COEF3_C20_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF3_C20_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL1_CSC_COEF3_C21_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL1_CSC_COEF3_C21_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF3_C21_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MAX                                (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VIDL1_CSC_COEF4_C22_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL1_CSC_COEF4_C22_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF4_C22_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MASK                               (0xFFFFF800U)
 #define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MAX                                (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MASK                                  (0x00000007U)
 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MAX                                   (0x00000007U)

 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MASK                                (0x0000FFF8U)
 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_SHIFT                               (0x00000003U)
 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MAX                                 (0x00001FFFU)

 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MASK                                 (0x00070000U)
 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_SHIFT                                (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MAX                                  (0x00000007U)

 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MASK                                (0xFFF80000U)
 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_SHIFT                               (0x00000013U)
 #define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MAX                                 (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MASK                                  (0x00000007U)
 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MAX                                   (0x00000007U)

 #define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MASK                                (0x0000FFF8U)
 #define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_SHIFT                               (0x00000003U)
 #define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MAX                                 (0x00001FFFU)

 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MASK                                 (0x00070000U)
 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_SHIFT                                (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MAX                                  (0x00000007U)

 #define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MASK                               (0xFFF80000U)
 #define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_SHIFT                              (0x00000013U)
 #define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MAX                                (0x00001FFFU)

 /* GLOBAL_ALPHA */

 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MASK                            (0x000000FFU)
 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT                           (0x00000000U)
 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MAX                             (0x000000FFU)

 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MASK                               (0xFFFFFF00U)
 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_SHIFT                              (0x00000008U)
 #define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MAX                                (0x00FFFFFFU)

 /* MFLAG_THRESHOLD */

 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MASK                            (0x0000FFFFU)
 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT                           (0x00000000U)
 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MAX                             (0x0000FFFFU)

 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MASK                            (0xFFFF0000U)
 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT                           (0x00000010U)
 #define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MAX                             (0x0000FFFFU)

 /* PICTURE_SIZE */

 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MASK                               (0x00003FFFU)
 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MAX                                (0x00003FFFU)

 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MASK                               (0x3FFF0000U)
 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_SHIFT                              (0x00000010U)
 #define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MAX                                (0x00003FFFU)

 /* PIXEL_INC */

 #define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MASK                                  (0x000000FFU)
 #define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MAX                                   (0x000000FFU)

 #define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MASK                               (0xFFFFFF00U)
 #define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_SHIFT                              (0x00000008U)
 #define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MAX                                (0x00FFFFFFU)

 /* PRELOAD */

 #define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MASK                                     (0x00000FFFU)
 #define CSL_DSS_VIDL1_PRELOAD_PRELOAD_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MAX                                      (0x00000FFFU)

 #define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MASK                                (0xFFFFF000U)
 #define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_SHIFT                               (0x0000000CU)
 #define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MAX                                 (0x000FFFFFU)

 /* ROW_INC */

 #define CSL_DSS_VIDL1_ROW_INC_ROWINC_MASK                                      (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_ROW_INC_ROWINC_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_ROW_INC_ROWINC_MAX                                       (0xFFFFFFFFU)

 /* BA_EXT_0 */

 #define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MASK                                     (0x0000FFFFU)
 #define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MAX                                      (0x0000FFFFU)

 #define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MASK                                   (0xFFFF0000U)
 #define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MAX                                    (0x0000FFFFU)

 /* BA_EXT_1 */

 #define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MASK                                     (0x0000FFFFU)
 #define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MAX                                      (0x0000FFFFU)

 #define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MASK                                   (0xFFFF0000U)
 #define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MAX                                    (0x0000FFFFU)

 /* BA_UV_EXT_0 */

 #define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MASK                               (0x0000FFFFU)
 #define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MAX                                (0x0000FFFFU)

 #define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MASK                                (0xFFFF0000U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_SHIFT                               (0x00000010U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MAX                                 (0x0000FFFFU)

 /* BA_UV_EXT_1 */

 #define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MASK                               (0x0000FFFFU)
 #define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MAX                                (0x0000FFFFU)

 #define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MASK                                (0xFFFF0000U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_SHIFT                               (0x00000010U)
 #define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MAX                                 (0x0000FFFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MASK                                  (0x00000007U)
 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MAX                                   (0x00000007U)

 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MASK                               (0x0000FFF8U)
 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_SHIFT                              (0x00000003U)
 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MAX                                (0x00001FFFU)

 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MASK                                 (0x00070000U)
 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_SHIFT                                (0x00000010U)
 #define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MAX                                  (0x00000007U)

 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MASK                               (0xFFF80000U)
 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_SHIFT                              (0x00000013U)
 #define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MAX                                (0x00001FFFU)

 /* ROW_INC_UV */

 #define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MASK                                   (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MAX                                    (0xFFFFFFFFU)

 /* TILE */

 #define CSL_DSS_VIDL1_TILE_TILEINDEX_MASK                                      (0x007FFFFFU)
 #define CSL_DSS_VIDL1_TILE_TILEINDEX_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_TILE_TILEINDEX_MAX                                       (0x007FFFFFU)

 /* TILE2 */

 #define CSL_DSS_VIDL1_TILE2_NUM_TILES_MASK                                     (0x007FFFFFU)
 #define CSL_DSS_VIDL1_TILE2_NUM_TILES_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_TILE2_NUM_TILES_MAX                                      (0x007FFFFFU)

 #define CSL_DSS_VIDL1_TILE2_RESERVED_MASK                                      (0xFF800000U)
 #define CSL_DSS_VIDL1_TILE2_RESERVED_SHIFT                                     (0x00000017U)
 #define CSL_DSS_VIDL1_TILE2_RESERVED_MAX                                       (0x000001FFU)

 /* FBDC_ATTRIBUTES */

 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MASK                              (0x00000001U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MAX                               (0x00000001U)

 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MASK                              (0x000000FEU)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_SHIFT                             (0x00000001U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MAX                               (0x0000007FU)

 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8                      (0xCU)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10                   (0xEU)

 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MASK                            (0x00000300U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_SHIFT                           (0x00000008U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MAX                             (0x00000003U)

 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4                   (0x2U)
 #define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2                   (0x3U)

 /* FBDC_CLEAR_COLOR */

 #define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK                         (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT                        (0x00000000U)
 #define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX                          (0xFFFFFFFFU)

 /* CLUT_0 */

 #define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_0_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_0_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_0_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_0_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_0_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_0_INDEX_MAX                                         (0x00000001U)

 /* CLUT_1 */

 #define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_1_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_1_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_1_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_1_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_1_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_1_INDEX_MAX                                         (0x00000001U)

 /* CLUT_2 */

 #define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_2_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_2_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_2_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_2_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_2_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_2_INDEX_MAX                                         (0x00000001U)

 /* CLUT_3 */

 #define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_3_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_3_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_3_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_3_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_3_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_3_INDEX_MAX                                         (0x00000001U)

 /* CLUT_4 */

 #define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_4_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_4_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_4_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_4_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_4_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_4_INDEX_MAX                                         (0x00000001U)

 /* CLUT_5 */

 #define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_5_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_5_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_5_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_5_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_5_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_5_INDEX_MAX                                         (0x00000001U)

 /* CLUT_6 */

 #define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_6_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_6_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_6_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_6_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_6_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_6_INDEX_MAX                                         (0x00000001U)

 /* CLUT_7 */

 #define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_7_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_7_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_7_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_7_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_7_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_7_INDEX_MAX                                         (0x00000001U)

 /* CLUT_8 */

 #define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_8_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_8_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_8_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_8_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_8_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_8_INDEX_MAX                                         (0x00000001U)

 /* CLUT_9 */

 #define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_9_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_9_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_9_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_9_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_9_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_9_INDEX_MAX                                         (0x00000001U)

 /* CLUT_10 */

 #define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_10_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_10_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_10_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_10_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_10_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_10_INDEX_MAX                                        (0x00000001U)

 /* CLUT_11 */

 #define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_11_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_11_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_11_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_11_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_11_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_11_INDEX_MAX                                        (0x00000001U)

 /* CLUT_12 */

 #define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_12_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_12_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_12_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_12_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_12_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_12_INDEX_MAX                                        (0x00000001U)

 /* CLUT_13 */

 #define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_13_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_13_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_13_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_13_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_13_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_13_INDEX_MAX                                        (0x00000001U)

 /* CLUT_14 */

 #define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_14_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_14_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_14_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_14_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_14_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_14_INDEX_MAX                                        (0x00000001U)

 /* CLUT_15 */

 #define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL1_CLUT_15_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL1_CLUT_15_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL1_CLUT_15_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL1_CLUT_15_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL1_CLUT_15_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL1_CLUT_15_INDEX_MAX                                        (0x00000001U)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MASK                            (0x00000001U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_SHIFT                           (0x00000000U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MAX                             (0x00000001U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                       (0x00000002U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                      (0x00000001U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                        (0x00000001U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK              (0x1U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE            (0x0U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                        (0x00000004U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                       (0x00000002U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                         (0x00000001U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                  (0x1U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                 (0x0U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MASK                         (0x000007F8U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                        (0x00000003U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MAX                          (0x000000FFU)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                         (0x00001800U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                        (0x0000000BU)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                          (0x00000003U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE                  (0x0U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                     (0x1U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                      (0x2U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                 (0x3U)

 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MASK                          (0xFFFFE000U)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_SHIFT                         (0x0000000DU)
 #define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MAX                           (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                     (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                    (0x00000000U)
 #define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                      (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MASK                                (0x00003FFFU)
 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_SHIFT                               (0x00000000U)
 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MASK                                (0x3FFF0000U)
 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_SHIFT                               (0x00000010U)
 #define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MAX                                 (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                      (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                     (0x00000000U)
 #define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                       (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MASK                                   (0x00003FFFU)
 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MAX                                    (0x00003FFFU)

 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MASK                                   (0x3FFF0000U)
 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MAX                                    (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MASK                               (0xFFFFFFFFU)
 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MAX                                (0xFFFFFFFFU)

 /* LUMAKEY */

 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MASK                                  (0x00000FFFU)
 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MAX                                   (0x00000FFFU)

 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MASK                                    (0x0000F000U)
 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED_SHIFT                                   (0x0000000CU)
 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MAX                                     (0x0000000FU)

 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MASK                                  (0x0FFF0000U)
 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MAX                                   (0x00000FFFU)

 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MASK                                   (0xF0000000U)
 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_SHIFT                                  (0x0000001CU)
 #define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MAX                                    (0x0000000FU)

 /* DMA_BUFSIZE */

 #define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MASK                                 (0x0000001FU)
 #define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_SHIFT                                (0x00000000U)
 #define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MAX                                  (0x0000001FU)

 #define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MASK                                (0xFFFFFFE0U)
 #define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_SHIFT                               (0x00000005U)
 #define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MAX                                 (0x07FFFFFFU)

 /* CROP */

 #define CSL_DSS_VIDL1_CROP_CROPLEFT_MASK                                       (0x0000001FU)
 #define CSL_DSS_VIDL1_CROP_CROPLEFT_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_CROP_CROPLEFT_MAX                                        (0x0000001FU)

 #define CSL_DSS_VIDL1_CROP_CROPRIGHT_MASK                                      (0x00001F00U)
 #define CSL_DSS_VIDL1_CROP_CROPRIGHT_SHIFT                                     (0x00000008U)
 #define CSL_DSS_VIDL1_CROP_CROPRIGHT_MAX                                       (0x0000001FU)

 #define CSL_DSS_VIDL1_CROP_CROPTOP_MASK                                        (0x001F0000U)
 #define CSL_DSS_VIDL1_CROP_CROPTOP_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VIDL1_CROP_CROPTOP_MAX                                         (0x0000001FU)

 #define CSL_DSS_VIDL1_CROP_CROPBOTTOM_MASK                                     (0x1F000000U)
 #define CSL_DSS_VIDL1_CROP_CROPBOTTOM_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VIDL1_CROP_CROPBOTTOM_MAX                                      (0x0000001FU)

 /* SECURE */

 #define CSL_DSS_VIDL1_SECURE_SECURE_MASK                                       (0x00000001U)
 #define CSL_DSS_VIDL1_SECURE_SECURE_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_SECURE_SECURE_MAX                                        (0x00000001U)

 #define CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREDIS                              (0x0U)
 #define CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREEN                               (0x1U)

 #define CSL_DSS_VIDL1_SECURE_RESERVED_MASK                                     (0xFFFFFFFEU)
 #define CSL_DSS_VIDL1_SECURE_RESERVED_SHIFT                                    (0x00000001U)
 #define CSL_DSS_VIDL1_SECURE_RESERVED_MAX                                      (0x7FFFFFFFU)

 /* PIPE_GO */

 #define CSL_DSS_VIDL1_PIPE_GO_GOBIT_MASK                                       (0x00000001U)
 #define CSL_DSS_VIDL1_PIPE_GO_GOBIT_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL1_PIPE_GO_GOBIT_MAX                                        (0x00000001U)

 #define CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_HFUISR                                 (0x0U)
 #define CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_UFPSR                                  (0x1U)

 #define CSL_DSS_VIDL1_PIPE_GO_RESERVED_MASK                                    (0xFFFFFFFEU)
 #define CSL_DSS_VIDL1_PIPE_GO_RESERVED_SHIFT                                   (0x00000001U)
 #define CSL_DSS_VIDL1_PIPE_GO_RESERVED_MAX                                     (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VIDL2 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint8_t  Resv_32[32];
     volatile uint32_t ATTRIBUTES;                /* ATTRIBUTES */
     volatile uint32_t ATTRIBUTES2;               /* ATTRIBUTES2 */
     volatile uint32_t BA_0;                      /* BA_0 */
     volatile uint32_t BA_1;                      /* BA_1 */
     volatile uint32_t BA_UV_0;                   /* BA_UV_0 */
     volatile uint32_t BA_UV_1;                   /* BA_UV_1 */
     volatile uint32_t BUF_SIZE_STATUS;           /* BUF_SIZE_STATUS */
     volatile uint32_t BUF_THRESHOLD;             /* BUF_THRESHOLD */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint8_t  Resv_508[416];
     volatile uint32_t GLOBAL_ALPHA;              /* GLOBAL_ALPHA */
     volatile uint8_t  Resv_520[8];
     volatile uint32_t MFLAG_THRESHOLD;           /* MFLAG_THRESHOLD */
     volatile uint32_t PICTURE_SIZE;              /* PICTURE_SIZE */
     volatile uint32_t PIXEL_INC;                 /* PIXEL_INC */
     volatile uint8_t  Resv_536[4];
     volatile uint32_t PRELOAD;                   /* PRELOAD */
     volatile uint32_t ROW_INC;                   /* ROW_INC */
     volatile uint8_t  Resv_556[12];
     volatile uint32_t BA_EXT_0;                  /* BA_EXT_0 */
     volatile uint32_t BA_EXT_1;                  /* BA_EXT_1 */
     volatile uint32_t BA_UV_EXT_0;               /* BA_UV_EXT_0 */
     volatile uint32_t BA_UV_EXT_1;               /* BA_UV_EXT_1 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint8_t  Resv_584[8];
     volatile uint32_t ROW_INC_UV;                /* ROW_INC_UV */
     volatile uint32_t TILE;                      /* TILE */
     volatile uint32_t TILE2;                     /* TILE2 */
     volatile uint32_t FBDC_ATTRIBUTES;           /* FBDC_ATTRIBUTES */
     volatile uint32_t FBDC_CLEAR_COLOR;          /* FBDC_CLEAR_COLOR */
     volatile uint8_t  Resv_608[4];
     volatile uint32_t CLUT_0;                    /* CLUT_0 */
     volatile uint32_t CLUT_1;                    /* CLUT_1 */
     volatile uint32_t CLUT_2;                    /* CLUT_2 */
     volatile uint32_t CLUT_3;                    /* CLUT_3 */
     volatile uint32_t CLUT_4;                    /* CLUT_4 */
     volatile uint32_t CLUT_5;                    /* CLUT_5 */
     volatile uint32_t CLUT_6;                    /* CLUT_6 */
     volatile uint32_t CLUT_7;                    /* CLUT_7 */
     volatile uint32_t CLUT_8;                    /* CLUT_8 */
     volatile uint32_t CLUT_9;                    /* CLUT_9 */
     volatile uint32_t CLUT_10;                   /* CLUT_10 */
     volatile uint32_t CLUT_11;                   /* CLUT_11 */
     volatile uint32_t CLUT_12;                   /* CLUT_12 */
     volatile uint32_t CLUT_13;                   /* CLUT_13 */
     volatile uint32_t CLUT_14;                   /* CLUT_14 */
     volatile uint32_t CLUT_15;                   /* CLUT_15 */
     volatile uint32_t SAFETY_ATTRIBUTES;         /* SAFETY_ATTRIBUTES */
     volatile uint32_t SAFETY_CAPT_SIGNATURE;     /* SAFETY_CAPT_SIGNATURE */
     volatile uint32_t SAFETY_POSITION;           /* SAFETY_POSITION */
     volatile uint32_t SAFETY_REF_SIGNATURE;      /* SAFETY_REF_SIGNATURE */
     volatile uint32_t SAFETY_SIZE;               /* SAFETY_SIZE */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint32_t LUMAKEY;                   /* LUMAKEY */
     volatile uint32_t DMA_BUFSIZE;               /* DMA_BUFSIZE */
     volatile uint32_t CROP;                      /* CROP */
     volatile uint32_t SECURE;                    /* SECURE */
     volatile uint32_t PIPE_GO;                   /* PIPE_GO */
 } CSL_dss_vidl2Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VIDL2_ATTRIBUTES                                               (0x00000020U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2                                              (0x00000024U)
 #define CSL_DSS_VIDL2_BA_0                                                     (0x00000028U)
 #define CSL_DSS_VIDL2_BA_1                                                     (0x0000002CU)
 #define CSL_DSS_VIDL2_BA_UV_0                                                  (0x00000030U)
 #define CSL_DSS_VIDL2_BA_UV_1                                                  (0x00000034U)
 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS                                          (0x00000038U)
 #define CSL_DSS_VIDL2_BUF_THRESHOLD                                            (0x0000003CU)
 #define CSL_DSS_VIDL2_CSC_COEF0                                                (0x00000040U)
 #define CSL_DSS_VIDL2_CSC_COEF1                                                (0x00000044U)
 #define CSL_DSS_VIDL2_CSC_COEF2                                                (0x00000048U)
 #define CSL_DSS_VIDL2_CSC_COEF3                                                (0x0000004CU)
 #define CSL_DSS_VIDL2_CSC_COEF4                                                (0x00000050U)
 #define CSL_DSS_VIDL2_CSC_COEF5                                                (0x00000054U)
 #define CSL_DSS_VIDL2_CSC_COEF6                                                (0x00000058U)
 #define CSL_DSS_VIDL2_GLOBAL_ALPHA                                             (0x000001FCU)
 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD                                          (0x00000208U)
 #define CSL_DSS_VIDL2_PICTURE_SIZE                                             (0x0000020CU)
 #define CSL_DSS_VIDL2_PIXEL_INC                                                (0x00000210U)
 #define CSL_DSS_VIDL2_PRELOAD                                                  (0x00000218U)
 #define CSL_DSS_VIDL2_ROW_INC                                                  (0x0000021CU)
 #define CSL_DSS_VIDL2_BA_EXT_0                                                 (0x0000022CU)
 #define CSL_DSS_VIDL2_BA_EXT_1                                                 (0x00000230U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_0                                              (0x00000234U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_1                                              (0x00000238U)
 #define CSL_DSS_VIDL2_CSC_COEF7                                                (0x0000023CU)
 #define CSL_DSS_VIDL2_ROW_INC_UV                                               (0x00000248U)
 #define CSL_DSS_VIDL2_TILE                                                     (0x0000024CU)
 #define CSL_DSS_VIDL2_TILE2                                                    (0x00000250U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES                                          (0x00000254U)
 #define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR                                         (0x00000258U)
 #define CSL_DSS_VIDL2_CLUT_0                                                   (0x00000260U)
 #define CSL_DSS_VIDL2_CLUT_1                                                   (0x00000264U)
 #define CSL_DSS_VIDL2_CLUT_2                                                   (0x00000268U)
 #define CSL_DSS_VIDL2_CLUT_3                                                   (0x0000026CU)
 #define CSL_DSS_VIDL2_CLUT_4                                                   (0x00000270U)
 #define CSL_DSS_VIDL2_CLUT_5                                                   (0x00000274U)
 #define CSL_DSS_VIDL2_CLUT_6                                                   (0x00000278U)
 #define CSL_DSS_VIDL2_CLUT_7                                                   (0x0000027CU)
 #define CSL_DSS_VIDL2_CLUT_8                                                   (0x00000280U)
 #define CSL_DSS_VIDL2_CLUT_9                                                   (0x00000284U)
 #define CSL_DSS_VIDL2_CLUT_10                                                  (0x00000288U)
 #define CSL_DSS_VIDL2_CLUT_11                                                  (0x0000028CU)
 #define CSL_DSS_VIDL2_CLUT_12                                                  (0x00000290U)
 #define CSL_DSS_VIDL2_CLUT_13                                                  (0x00000294U)
 #define CSL_DSS_VIDL2_CLUT_14                                                  (0x00000298U)
 #define CSL_DSS_VIDL2_CLUT_15                                                  (0x0000029CU)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES                                        (0x000002A0U)
 #define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE                                    (0x000002A4U)
 #define CSL_DSS_VIDL2_SAFETY_POSITION                                          (0x000002A8U)
 #define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE                                     (0x000002ACU)
 #define CSL_DSS_VIDL2_SAFETY_SIZE                                              (0x000002B0U)
 #define CSL_DSS_VIDL2_SAFETY_LFSR_SEED                                         (0x000002B4U)
 #define CSL_DSS_VIDL2_LUMAKEY                                                  (0x000002B8U)
 #define CSL_DSS_VIDL2_DMA_BUFSIZE                                              (0x000002BCU)
 #define CSL_DSS_VIDL2_CROP                                                     (0x000002C0U)
 #define CSL_DSS_VIDL2_SECURE                                                   (0x000002C4U)
 #define CSL_DSS_VIDL2_PIPE_GO                                                  (0x000002C8U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* ATTRIBUTES */

 #define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MASK                                   (0x00000001U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MAX                                    (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEOENB                           (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEODIS                           (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MASK                                   (0x0000007EU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_SHIFT                                  (0x00000001U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MAX                                    (0x0000003FU)

 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444                        (0x0U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444                        (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444                        (0x2U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB16_565                          (0x3U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR16_565                          (0x4U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555                        (0x5U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555                        (0x6U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888                        (0x7U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888                        (0x8U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888                        (0x9U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888                        (0xAU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB24P_888                         (0xBU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR24P_888                         (0xCU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010                     (0xEU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010                     (0xFU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616                    (0x10U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616                    (0x11U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP1                            (0x12U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP2                            (0x13U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP4                            (0x14U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP8                            (0x15U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB565A8                           (0x16U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR565A8                           (0x17U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444                        (0x20U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444                        (0x21U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444                        (0x22U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555                        (0x25U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555                        (0x26U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888                        (0x27U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888                        (0x28U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888                        (0x29U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888                        (0x2AU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010                     (0x2EU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010                     (0x2FU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616                    (0x30U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616                    (0x31U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12                        (0x3CU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12                        (0x3DU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2                        (0x3EU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY                        (0x3FU)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MASK                                (0x00000180U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_SHIFT                               (0x00000007U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MAX                                 (0x00000003U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MASK                          (0x00000200U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_SHIFT                         (0x00000009U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MAX                           (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB                 (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS                 (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MASK                               (0x00000400U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_SHIFT                              (0x0000000AU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN                   (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS                  (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MASK                                (0x00000800U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE                       (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE                        (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MASK                                     (0x00001000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MAX                                      (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_FLIP                                 (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_NOFLIP                               (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_CROP_MASK                                     (0x00002000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_CROP_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_CROP_MAX                                      (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPEN                               (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPDIS                              (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MASK                                (0x0001C000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_SHIFT                               (0x0000000EU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MAX                                 (0x00000007U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MASK                          (0x00020000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT                         (0x00000011U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MAX                           (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN         (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS        (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MASK                                (0x00040000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_SHIFT                               (0x00000012U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MASK                               (0x00080000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_SHIFT                              (0x00000013U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES                      (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL                         (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MASK                                (0x00100000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MASK                                (0x00200000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_SHIFT                               (0x00000015U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MASK                                (0x00400000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_SHIFT                               (0x00000016U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MASK                              (0x00800000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_SHIFT                             (0x00000017U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MAX                               (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO                      (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO                    (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MASK                              (0x01000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_SHIFT                             (0x00000018U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MAX                               (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB                (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS                (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MASK                                (0x0E000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_SHIFT                               (0x00000019U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MAX                                 (0x00000007U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MASK                         (0x10000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT                        (0x0000001CU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MAX                          (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA       (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA    (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK                        (0x20000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT                       (0x0000001DU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX                         (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER               (0x0U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER              (0x1U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MASK                           (0x40000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_SHIFT                          (0x0000001EU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MAX                            (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN                 (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS                (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MASK                            (0x80000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_SHIFT                           (0x0000001FU)
 #define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MAX                             (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN                   (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS                  (0x0U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MASK                               (0x00000001U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB                         (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS                         (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MASK                             (0x0000000EU)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT                            (0x00000001U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MAX                              (0x00000007U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK                          (0x00000070U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT                         (0x00000004U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX                           (0x00000007U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MASK                                (0x00000180U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_SHIFT                               (0x00000007U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MAX                                 (0x00000003U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_8B                              (0x0U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_10B                             (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_12B                             (0x2U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MASK                                (0x00000200U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_SHIFT                               (0x00000009U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_PACKED                          (0x0U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED                        (0x1U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MASK                               (0x00000400U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_SHIFT                              (0x0000000AU)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MAX                                (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB                            (0x1U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB                            (0x0U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MASK                               (0x01F00000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_SHIFT                              (0x00000014U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MASK                                (0x02000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_SHIFT                               (0x00000019U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MAX                                 (0x00000001U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY                         (0x0U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY                       (0x1U)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MASK                                    (0x7C000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_SHIFT                                   (0x0000001AU)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MAX                                     (0x0000001FU)

 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MASK                               (0x80000000U)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_SHIFT                              (0x0000001FU)
 #define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MAX                                (0x00000001U)

 /* BA_0 */

 #define CSL_DSS_VIDL2_BA_0_BA_MASK                                             (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_BA_0_BA_SHIFT                                            (0x00000000U)
 #define CSL_DSS_VIDL2_BA_0_BA_MAX                                              (0xFFFFFFFFU)

 /* BA_1 */

 #define CSL_DSS_VIDL2_BA_1_BA_MASK                                             (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_BA_1_BA_SHIFT                                            (0x00000000U)
 #define CSL_DSS_VIDL2_BA_1_BA_MAX                                              (0xFFFFFFFFU)

 /* BA_UV_0 */

 #define CSL_DSS_VIDL2_BA_UV_0_BA_MASK                                          (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_BA_UV_0_BA_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VIDL2_BA_UV_0_BA_MAX                                           (0xFFFFFFFFU)

 /* BA_UV_1 */

 #define CSL_DSS_VIDL2_BA_UV_1_BA_MASK                                          (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_BA_UV_1_BA_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VIDL2_BA_UV_1_BA_MAX                                           (0xFFFFFFFFU)

 /* BUF_SIZE_STATUS */

 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MASK                             (0x0000FFFFU)
 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_SHIFT                            (0x00000000U)
 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MAX                              (0x0000FFFFU)

 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MASK                         (0xFFFF0000U)
 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_SHIFT                        (0x00000010U)
 #define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MAX                          (0x0000FFFFU)

 /* BUF_THRESHOLD */

 #define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK                       (0x0000FFFFU)
 #define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT                      (0x00000000U)
 #define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX                        (0x0000FFFFU)

 #define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK                      (0xFFFF0000U)
 #define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT                     (0x00000010U)
 #define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX                       (0x0000FFFFU)

 /* CSC_COEF0 */

 #define CSL_DSS_VIDL2_CSC_COEF0_C00_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL2_CSC_COEF0_C00_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF0_C00_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL2_CSC_COEF0_C01_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL2_CSC_COEF0_C01_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF0_C01_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MAX                                (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VIDL2_CSC_COEF1_C02_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL2_CSC_COEF1_C02_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF1_C02_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL2_CSC_COEF1_C10_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL2_CSC_COEF1_C10_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF1_C10_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MAX                                (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VIDL2_CSC_COEF2_C11_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL2_CSC_COEF2_C11_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF2_C11_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL2_CSC_COEF2_C12_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL2_CSC_COEF2_C12_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF2_C12_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MAX                                (0x0000001FU)

 /* CSC_COEF3 */

 #define CSL_DSS_VIDL2_CSC_COEF3_C20_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL2_CSC_COEF3_C20_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF3_C20_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MASK                               (0x0000F800U)
 #define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MAX                                (0x0000001FU)

 #define CSL_DSS_VIDL2_CSC_COEF3_C21_MASK                                       (0x07FF0000U)
 #define CSL_DSS_VIDL2_CSC_COEF3_C21_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF3_C21_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MASK                               (0xF8000000U)
 #define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_SHIFT                              (0x0000001BU)
 #define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MAX                                (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VIDL2_CSC_COEF4_C22_MASK                                       (0x000007FFU)
 #define CSL_DSS_VIDL2_CSC_COEF4_C22_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF4_C22_MAX                                        (0x000007FFU)

 #define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MASK                               (0xFFFFF800U)
 #define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_SHIFT                              (0x0000000BU)
 #define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MAX                                (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MASK                                  (0x00000007U)
 #define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MAX                                   (0x00000007U)

 #define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MASK                                (0x0000FFF8U)
 #define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_SHIFT                               (0x00000003U)
 #define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MAX                                 (0x00001FFFU)

 #define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MASK                                 (0x00070000U)
 #define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_SHIFT                                (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MAX                                  (0x00000007U)

 #define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MASK                                (0xFFF80000U)
 #define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_SHIFT                               (0x00000013U)
 #define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MAX                                 (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MASK                                  (0x00000007U)
 #define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MAX                                   (0x00000007U)

 #define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MASK                                (0x0000FFF8U)
 #define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_SHIFT                               (0x00000003U)
 #define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MAX                                 (0x00001FFFU)

 #define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MASK                                 (0x00070000U)
 #define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_SHIFT                                (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MAX                                  (0x00000007U)

 #define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MASK                               (0xFFF80000U)
 #define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_SHIFT                              (0x00000013U)
 #define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MAX                                (0x00001FFFU)

 /* GLOBAL_ALPHA */

 #define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MASK                            (0x000000FFU)
 #define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT                           (0x00000000U)
 #define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MAX                             (0x000000FFU)

 #define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MASK                               (0xFFFFFF00U)
 #define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_SHIFT                              (0x00000008U)
 #define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MAX                                (0x00FFFFFFU)

 /* MFLAG_THRESHOLD */

 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MASK                            (0x0000FFFFU)
 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT                           (0x00000000U)
 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MAX                             (0x0000FFFFU)

 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MASK                            (0xFFFF0000U)
 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT                           (0x00000010U)
 #define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MAX                             (0x0000FFFFU)

 /* PICTURE_SIZE */

 #define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MASK                               (0x00003FFFU)
 #define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MAX                                (0x00003FFFU)

 #define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MASK                               (0x3FFF0000U)
 #define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_SHIFT                              (0x00000010U)
 #define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MAX                                (0x00003FFFU)

 /* PIXEL_INC */

 #define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MASK                                  (0x000000FFU)
 #define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MAX                                   (0x000000FFU)

 #define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MASK                               (0xFFFFFF00U)
 #define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_SHIFT                              (0x00000008U)
 #define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MAX                                (0x00FFFFFFU)

 /* PRELOAD */

 #define CSL_DSS_VIDL2_PRELOAD_PRELOAD_MASK                                     (0x00000FFFU)
 #define CSL_DSS_VIDL2_PRELOAD_PRELOAD_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_PRELOAD_PRELOAD_MAX                                      (0x00000FFFU)

 #define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MASK                                (0xFFFFF000U)
 #define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_SHIFT                               (0x0000000CU)
 #define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MAX                                 (0x000FFFFFU)

 /* ROW_INC */

 #define CSL_DSS_VIDL2_ROW_INC_ROWINC_MASK                                      (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_ROW_INC_ROWINC_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_ROW_INC_ROWINC_MAX                                       (0xFFFFFFFFU)

 /* BA_EXT_0 */

 #define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MASK                                     (0x0000FFFFU)
 #define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MAX                                      (0x0000FFFFU)

 #define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MASK                                   (0xFFFF0000U)
 #define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MAX                                    (0x0000FFFFU)

 /* BA_EXT_1 */

 #define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MASK                                     (0x0000FFFFU)
 #define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MAX                                      (0x0000FFFFU)

 #define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MASK                                   (0xFFFF0000U)
 #define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MAX                                    (0x0000FFFFU)

 /* BA_UV_EXT_0 */

 #define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MASK                               (0x0000FFFFU)
 #define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MAX                                (0x0000FFFFU)

 #define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MASK                                (0xFFFF0000U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_SHIFT                               (0x00000010U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MAX                                 (0x0000FFFFU)

 /* BA_UV_EXT_1 */

 #define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MASK                               (0x0000FFFFU)
 #define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MAX                                (0x0000FFFFU)

 #define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MASK                                (0xFFFF0000U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_SHIFT                               (0x00000010U)
 #define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MAX                                 (0x0000FFFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MASK                                  (0x00000007U)
 #define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MAX                                   (0x00000007U)

 #define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MASK                               (0x0000FFF8U)
 #define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_SHIFT                              (0x00000003U)
 #define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MAX                                (0x00001FFFU)

 #define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MASK                                 (0x00070000U)
 #define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_SHIFT                                (0x00000010U)
 #define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MAX                                  (0x00000007U)

 #define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MASK                               (0xFFF80000U)
 #define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_SHIFT                              (0x00000013U)
 #define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MAX                                (0x00001FFFU)

 /* ROW_INC_UV */

 #define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MASK                                   (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MAX                                    (0xFFFFFFFFU)

 /* TILE */

 #define CSL_DSS_VIDL2_TILE_TILEINDEX_MASK                                      (0x007FFFFFU)
 #define CSL_DSS_VIDL2_TILE_TILEINDEX_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_TILE_TILEINDEX_MAX                                       (0x007FFFFFU)

 /* TILE2 */

 #define CSL_DSS_VIDL2_TILE2_NUM_TILES_MASK                                     (0x007FFFFFU)
 #define CSL_DSS_VIDL2_TILE2_NUM_TILES_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_TILE2_NUM_TILES_MAX                                      (0x007FFFFFU)

 #define CSL_DSS_VIDL2_TILE2_RESERVED_MASK                                      (0xFF800000U)
 #define CSL_DSS_VIDL2_TILE2_RESERVED_SHIFT                                     (0x00000017U)
 #define CSL_DSS_VIDL2_TILE2_RESERVED_MAX                                       (0x000001FFU)

 /* FBDC_ATTRIBUTES */

 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MASK                              (0x00000001U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MAX                               (0x00000001U)

 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MASK                              (0x000000FEU)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_SHIFT                             (0x00000001U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MAX                               (0x0000007FU)

 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8                      (0xCU)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10                   (0xEU)

 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MASK                            (0x00000300U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_SHIFT                           (0x00000008U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MAX                             (0x00000003U)

 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4                   (0x2U)
 #define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2                   (0x3U)

 /* FBDC_CLEAR_COLOR */

 #define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK                         (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT                        (0x00000000U)
 #define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX                          (0xFFFFFFFFU)

 /* CLUT_0 */

 #define CSL_DSS_VIDL2_CLUT_0_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_0_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_0_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_0_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_0_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_0_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_0_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_0_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_0_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_0_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_0_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_0_INDEX_MAX                                         (0x00000001U)

 /* CLUT_1 */

 #define CSL_DSS_VIDL2_CLUT_1_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_1_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_1_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_1_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_1_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_1_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_1_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_1_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_1_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_1_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_1_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_1_INDEX_MAX                                         (0x00000001U)

 /* CLUT_2 */

 #define CSL_DSS_VIDL2_CLUT_2_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_2_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_2_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_2_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_2_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_2_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_2_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_2_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_2_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_2_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_2_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_2_INDEX_MAX                                         (0x00000001U)

 /* CLUT_3 */

 #define CSL_DSS_VIDL2_CLUT_3_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_3_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_3_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_3_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_3_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_3_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_3_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_3_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_3_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_3_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_3_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_3_INDEX_MAX                                         (0x00000001U)

 /* CLUT_4 */

 #define CSL_DSS_VIDL2_CLUT_4_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_4_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_4_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_4_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_4_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_4_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_4_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_4_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_4_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_4_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_4_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_4_INDEX_MAX                                         (0x00000001U)

 /* CLUT_5 */

 #define CSL_DSS_VIDL2_CLUT_5_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_5_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_5_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_5_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_5_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_5_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_5_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_5_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_5_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_5_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_5_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_5_INDEX_MAX                                         (0x00000001U)

 /* CLUT_6 */

 #define CSL_DSS_VIDL2_CLUT_6_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_6_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_6_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_6_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_6_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_6_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_6_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_6_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_6_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_6_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_6_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_6_INDEX_MAX                                         (0x00000001U)

 /* CLUT_7 */

 #define CSL_DSS_VIDL2_CLUT_7_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_7_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_7_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_7_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_7_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_7_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_7_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_7_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_7_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_7_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_7_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_7_INDEX_MAX                                         (0x00000001U)

 /* CLUT_8 */

 #define CSL_DSS_VIDL2_CLUT_8_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_8_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_8_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_8_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_8_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_8_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_8_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_8_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_8_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_8_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_8_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_8_INDEX_MAX                                         (0x00000001U)

 /* CLUT_9 */

 #define CSL_DSS_VIDL2_CLUT_9_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_9_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_9_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_9_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_9_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_9_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_9_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_9_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_9_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_9_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_9_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_9_INDEX_MAX                                         (0x00000001U)

 /* CLUT_10 */

 #define CSL_DSS_VIDL2_CLUT_10_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_10_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_10_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_10_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_10_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_10_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_10_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_10_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_10_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_10_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_10_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_10_INDEX_MAX                                        (0x00000001U)

 /* CLUT_11 */

 #define CSL_DSS_VIDL2_CLUT_11_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_11_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_11_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_11_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_11_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_11_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_11_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_11_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_11_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_11_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_11_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_11_INDEX_MAX                                        (0x00000001U)

 /* CLUT_12 */

 #define CSL_DSS_VIDL2_CLUT_12_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_12_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_12_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_12_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_12_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_12_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_12_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_12_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_12_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_12_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_12_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_12_INDEX_MAX                                        (0x00000001U)

 /* CLUT_13 */

 #define CSL_DSS_VIDL2_CLUT_13_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_13_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_13_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_13_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_13_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_13_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_13_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_13_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_13_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_13_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_13_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_13_INDEX_MAX                                        (0x00000001U)

 /* CLUT_14 */

 #define CSL_DSS_VIDL2_CLUT_14_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_14_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_14_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_14_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_14_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_14_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_14_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_14_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_14_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_14_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_14_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_14_INDEX_MAX                                        (0x00000001U)

 /* CLUT_15 */

 #define CSL_DSS_VIDL2_CLUT_15_VALUE_B_MASK                                     (0x000003FFU)
 #define CSL_DSS_VIDL2_CLUT_15_VALUE_B_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VIDL2_CLUT_15_VALUE_B_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_15_VALUE_G_MASK                                     (0x000FFC00U)
 #define CSL_DSS_VIDL2_CLUT_15_VALUE_G_SHIFT                                    (0x0000000AU)
 #define CSL_DSS_VIDL2_CLUT_15_VALUE_G_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_15_VALUE_R_MASK                                     (0x3FF00000U)
 #define CSL_DSS_VIDL2_CLUT_15_VALUE_R_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VIDL2_CLUT_15_VALUE_R_MAX                                      (0x000003FFU)

 #define CSL_DSS_VIDL2_CLUT_15_INDEX_MASK                                       (0x80000000U)
 #define CSL_DSS_VIDL2_CLUT_15_INDEX_SHIFT                                      (0x0000001FU)
 #define CSL_DSS_VIDL2_CLUT_15_INDEX_MAX                                        (0x00000001U)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MASK                            (0x00000001U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_SHIFT                           (0x00000000U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MAX                             (0x00000001U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                       (0x00000002U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                      (0x00000001U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                        (0x00000001U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK              (0x1U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE            (0x0U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                        (0x00000004U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                       (0x00000002U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                         (0x00000001U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                  (0x1U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                 (0x0U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MASK                         (0x000007F8U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                        (0x00000003U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MAX                          (0x000000FFU)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                         (0x00001800U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                        (0x0000000BU)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                          (0x00000003U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE                  (0x0U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                     (0x1U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                      (0x2U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                 (0x3U)

 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MASK                          (0xFFFFE000U)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_SHIFT                         (0x0000000DU)
 #define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MAX                           (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                     (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                    (0x00000000U)
 #define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                      (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MASK                                (0x00003FFFU)
 #define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_SHIFT                               (0x00000000U)
 #define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MASK                                (0x3FFF0000U)
 #define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_SHIFT                               (0x00000010U)
 #define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MAX                                 (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                      (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                     (0x00000000U)
 #define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                       (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MASK                                   (0x00003FFFU)
 #define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MAX                                    (0x00003FFFU)

 #define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MASK                                   (0x3FFF0000U)
 #define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MAX                                    (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MASK                               (0xFFFFFFFFU)
 #define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_SHIFT                              (0x00000000U)
 #define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MAX                                (0xFFFFFFFFU)

 /* LUMAKEY */

 #define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MASK                                  (0x00000FFFU)
 #define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MAX                                   (0x00000FFFU)

 #define CSL_DSS_VIDL2_LUMAKEY_RESERVED_MASK                                    (0x0000F000U)
 #define CSL_DSS_VIDL2_LUMAKEY_RESERVED_SHIFT                                   (0x0000000CU)
 #define CSL_DSS_VIDL2_LUMAKEY_RESERVED_MAX                                     (0x0000000FU)

 #define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MASK                                  (0x0FFF0000U)
 #define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MAX                                   (0x00000FFFU)

 #define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MASK                                   (0xF0000000U)
 #define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_SHIFT                                  (0x0000001CU)
 #define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MAX                                    (0x0000000FU)

 /* DMA_BUFSIZE */

 #define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MASK                                 (0x0000001FU)
 #define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_SHIFT                                (0x00000000U)
 #define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MAX                                  (0x0000001FU)

 #define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MASK                                (0xFFFFFFE0U)
 #define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_SHIFT                               (0x00000005U)
 #define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MAX                                 (0x07FFFFFFU)

 /* CROP */

 #define CSL_DSS_VIDL2_CROP_CROPLEFT_MASK                                       (0x0000001FU)
 #define CSL_DSS_VIDL2_CROP_CROPLEFT_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_CROP_CROPLEFT_MAX                                        (0x0000001FU)

 #define CSL_DSS_VIDL2_CROP_CROPRIGHT_MASK                                      (0x00001F00U)
 #define CSL_DSS_VIDL2_CROP_CROPRIGHT_SHIFT                                     (0x00000008U)
 #define CSL_DSS_VIDL2_CROP_CROPRIGHT_MAX                                       (0x0000001FU)

 #define CSL_DSS_VIDL2_CROP_CROPTOP_MASK                                        (0x001F0000U)
 #define CSL_DSS_VIDL2_CROP_CROPTOP_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VIDL2_CROP_CROPTOP_MAX                                         (0x0000001FU)

 #define CSL_DSS_VIDL2_CROP_CROPBOTTOM_MASK                                     (0x1F000000U)
 #define CSL_DSS_VIDL2_CROP_CROPBOTTOM_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VIDL2_CROP_CROPBOTTOM_MAX                                      (0x0000001FU)

 /* SECURE */

 #define CSL_DSS_VIDL2_SECURE_SECURE_MASK                                       (0x00000001U)
 #define CSL_DSS_VIDL2_SECURE_SECURE_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_SECURE_SECURE_MAX                                        (0x00000001U)

 #define CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREDIS                              (0x0U)
 #define CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREEN                               (0x1U)

 #define CSL_DSS_VIDL2_SECURE_RESERVED_MASK                                     (0xFFFFFFFEU)
 #define CSL_DSS_VIDL2_SECURE_RESERVED_SHIFT                                    (0x00000001U)
 #define CSL_DSS_VIDL2_SECURE_RESERVED_MAX                                      (0x7FFFFFFFU)

 /* PIPE_GO */

 #define CSL_DSS_VIDL2_PIPE_GO_GOBIT_MASK                                       (0x00000001U)
 #define CSL_DSS_VIDL2_PIPE_GO_GOBIT_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VIDL2_PIPE_GO_GOBIT_MAX                                        (0x00000001U)

 #define CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_HFUISR                                 (0x0U)
 #define CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_UFPSR                                  (0x1U)

 #define CSL_DSS_VIDL2_PIPE_GO_RESERVED_MASK                                    (0xFFFFFFFEU)
 #define CSL_DSS_VIDL2_PIPE_GO_RESERVED_SHIFT                                   (0x00000001U)
 #define CSL_DSS_VIDL2_PIPE_GO_RESERVED_MAX                                     (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VID1 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t ACCUH_0;                   /* ACCUH_0 */
     volatile uint32_t ACCUH_1;                   /* ACCUH_1 */
     volatile uint32_t ACCUH2_0;                  /* ACCUH2_0 */
     volatile uint32_t ACCUH2_1;                  /* ACCUH2_1 */
     volatile uint32_t ACCUV_0;                   /* ACCUV_0 */
     volatile uint32_t ACCUV_1;                   /* ACCUV_1 */
     volatile uint32_t ACCUV2_0;                  /* ACCUV2_0 */
     volatile uint32_t ACCUV2_1;                  /* ACCUV2_1 */
     volatile uint32_t ATTRIBUTES;                /* ATTRIBUTES */
     volatile uint32_t ATTRIBUTES2;               /* ATTRIBUTES2 */
     volatile uint32_t BA_0;                      /* BA_0 */
     volatile uint32_t BA_1;                      /* BA_1 */
     volatile uint32_t BA_UV_0;                   /* BA_UV_0 */
     volatile uint32_t BA_UV_1;                   /* BA_UV_1 */
     volatile uint32_t BUF_SIZE_STATUS;           /* BUF_SIZE_STATUS */
     volatile uint32_t BUF_THRESHOLD;             /* BUF_THRESHOLD */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t FIRH;                      /* FIRH */
     volatile uint32_t FIRH2;                     /* FIRH2 */
     volatile uint32_t FIRV;                      /* FIRV */
     volatile uint32_t FIRV2;                     /* FIRV2 */
     volatile uint32_t FIR_COEF_H0[9U];           /* FIR_COEF_H0 0..8 */
     volatile uint32_t FIR_COEF_H0_C[9U];         /* FIR_COEF_H0_C 0..8 */
     volatile uint32_t FIR_COEF_H12[16U];         /* FIR_COEF_H12 0..15 */
     volatile uint32_t FIR_COEF_H12_C[16U];       /* FIR_COEF_H12_C 0..15 */
     volatile uint32_t FIR_COEF_V0[9U];           /* FIR_COEF_V0 0..8 */
     volatile uint32_t FIR_COEF_V0_C[9U];         /* FIR_COEF_V0_C 0..8 */
     volatile uint32_t FIR_COEF_V12[16U];         /* FIR_COEF_V12 0..15 */
     volatile uint32_t FIR_COEF_V12_C[16U];       /* FIR_COEF_V12_C 0..15 */
     volatile uint32_t GLOBAL_ALPHA;              /* GLOBAL_ALPHA */
     volatile uint8_t  Resv_520[8];
     volatile uint32_t MFLAG_THRESHOLD;           /* MFLAG_THRESHOLD */
     volatile uint32_t PICTURE_SIZE;              /* PICTURE_SIZE */
     volatile uint32_t PIXEL_INC;                 /* PIXEL_INC */
     volatile uint8_t  Resv_536[4];
     volatile uint32_t PRELOAD;                   /* PRELOAD */
     volatile uint32_t ROW_INC;                   /* ROW_INC */
     volatile uint32_t SIZE;                      /* SIZE */
     volatile uint8_t  Resv_556[8];
     volatile uint32_t BA_EXT_0;                  /* BA_EXT_0 */
     volatile uint32_t BA_EXT_1;                  /* BA_EXT_1 */
     volatile uint32_t BA_UV_EXT_0;               /* BA_UV_EXT_0 */
     volatile uint32_t BA_UV_EXT_1;               /* BA_UV_EXT_1 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint8_t  Resv_584[8];
     volatile uint32_t ROW_INC_UV;                /* ROW_INC_UV */
     volatile uint32_t TILE;                      /* TILE */
     volatile uint32_t TILE2;                     /* TILE2 */
     volatile uint32_t FBDC_ATTRIBUTES;           /* FBDC_ATTRIBUTES */
     volatile uint32_t FBDC_CLEAR_COLOR;          /* FBDC_CLEAR_COLOR */
     volatile uint8_t  Resv_608[4];
     volatile uint32_t CLUT_0;                    /* CLUT_0 */
     volatile uint32_t CLUT_1;                    /* CLUT_1 */
     volatile uint32_t CLUT_2;                    /* CLUT_2 */
     volatile uint32_t CLUT_3;                    /* CLUT_3 */
     volatile uint32_t CLUT_4;                    /* CLUT_4 */
     volatile uint32_t CLUT_5;                    /* CLUT_5 */
     volatile uint32_t CLUT_6;                    /* CLUT_6 */
     volatile uint32_t CLUT_7;                    /* CLUT_7 */
     volatile uint32_t CLUT_8;                    /* CLUT_8 */
     volatile uint32_t CLUT_9;                    /* CLUT_9 */
     volatile uint32_t CLUT_10;                   /* CLUT_10 */
     volatile uint32_t CLUT_11;                   /* CLUT_11 */
     volatile uint32_t CLUT_12;                   /* CLUT_12 */
     volatile uint32_t CLUT_13;                   /* CLUT_13 */
     volatile uint32_t CLUT_14;                   /* CLUT_14 */
     volatile uint32_t CLUT_15;                   /* CLUT_15 */
     volatile uint32_t SAFETY_ATTRIBUTES;         /* SAFETY_ATTRIBUTES */
     volatile uint32_t SAFETY_CAPT_SIGNATURE;     /* SAFETY_CAPT_SIGNATURE */
     volatile uint32_t SAFETY_POSITION;           /* SAFETY_POSITION */
     volatile uint32_t SAFETY_REF_SIGNATURE;      /* SAFETY_REF_SIGNATURE */
     volatile uint32_t SAFETY_SIZE;               /* SAFETY_SIZE */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint32_t LUMAKEY;                   /* LUMAKEY */
     volatile uint32_t DMA_BUFSIZE;               /* DMA_BUFSIZE */
     volatile uint32_t CROP;                      /* CROP */
     volatile uint32_t SECURE;                    /* SECURE */
     volatile uint32_t PIPE_GO;                   /* PIPE_GO */
 } CSL_dss_vid1Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VID1_ACCUH_0                                                   (0x00000000U)
 #define CSL_DSS_VID1_ACCUH_1                                                   (0x00000004U)
 #define CSL_DSS_VID1_ACCUH2_0                                                  (0x00000008U)
 #define CSL_DSS_VID1_ACCUH2_1                                                  (0x0000000CU)
 #define CSL_DSS_VID1_ACCUV_0                                                   (0x00000010U)
 #define CSL_DSS_VID1_ACCUV_1                                                   (0x00000014U)
 #define CSL_DSS_VID1_ACCUV2_0                                                  (0x00000018U)
 #define CSL_DSS_VID1_ACCUV2_1                                                  (0x0000001CU)
 #define CSL_DSS_VID1_ATTRIBUTES                                                (0x00000020U)
 #define CSL_DSS_VID1_ATTRIBUTES2                                               (0x00000024U)
 #define CSL_DSS_VID1_BA_0                                                      (0x00000028U)
 #define CSL_DSS_VID1_BA_1                                                      (0x0000002CU)
 #define CSL_DSS_VID1_BA_UV_0                                                   (0x00000030U)
 #define CSL_DSS_VID1_BA_UV_1                                                   (0x00000034U)
 #define CSL_DSS_VID1_BUF_SIZE_STATUS                                           (0x00000038U)
 #define CSL_DSS_VID1_BUF_THRESHOLD                                             (0x0000003CU)
 #define CSL_DSS_VID1_CSC_COEF0                                                 (0x00000040U)
 #define CSL_DSS_VID1_CSC_COEF1                                                 (0x00000044U)
 #define CSL_DSS_VID1_CSC_COEF2                                                 (0x00000048U)
 #define CSL_DSS_VID1_CSC_COEF3                                                 (0x0000004CU)
 #define CSL_DSS_VID1_CSC_COEF4                                                 (0x00000050U)
 #define CSL_DSS_VID1_CSC_COEF5                                                 (0x00000054U)
 #define CSL_DSS_VID1_CSC_COEF6                                                 (0x00000058U)
 #define CSL_DSS_VID1_FIRH                                                      (0x0000005CU)
 #define CSL_DSS_VID1_FIRH2                                                     (0x00000060U)
 #define CSL_DSS_VID1_FIRV                                                      (0x00000064U)
 #define CSL_DSS_VID1_FIRV2                                                     (0x00000068U)
 #define CSL_DSS_VID1_FIR_COEF_H0(index)                                        (0x0000006CU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_H0_C(index)                                      (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_H12(index)                                       (0x000000B4U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_H12_C(index)                                     (0x000000F4U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_V0(index)                                        (0x00000134U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_V0_C(index)                                      (0x00000158U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_V12(index)                                       (0x0000017CU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_FIR_COEF_V12_C(index)                                     (0x000001BCU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID1_GLOBAL_ALPHA                                              (0x000001FCU)
 #define CSL_DSS_VID1_MFLAG_THRESHOLD                                           (0x00000208U)
 #define CSL_DSS_VID1_PICTURE_SIZE                                              (0x0000020CU)
 #define CSL_DSS_VID1_PIXEL_INC                                                 (0x00000210U)
 #define CSL_DSS_VID1_PRELOAD                                                   (0x00000218U)
 #define CSL_DSS_VID1_ROW_INC                                                   (0x0000021CU)
 #define CSL_DSS_VID1_SIZE                                                      (0x00000220U)
 #define CSL_DSS_VID1_BA_EXT_0                                                  (0x0000022CU)
 #define CSL_DSS_VID1_BA_EXT_1                                                  (0x00000230U)
 #define CSL_DSS_VID1_BA_UV_EXT_0                                               (0x00000234U)
 #define CSL_DSS_VID1_BA_UV_EXT_1                                               (0x00000238U)
 #define CSL_DSS_VID1_CSC_COEF7                                                 (0x0000023CU)
 #define CSL_DSS_VID1_ROW_INC_UV                                                (0x00000248U)
 #define CSL_DSS_VID1_TILE                                                      (0x0000024CU)
 #define CSL_DSS_VID1_TILE2                                                     (0x00000250U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES                                           (0x00000254U)
 #define CSL_DSS_VID1_FBDC_CLEAR_COLOR                                          (0x00000258U)
 #define CSL_DSS_VID1_CLUT_0                                                    (0x00000260U)
 #define CSL_DSS_VID1_CLUT_1                                                    (0x00000264U)
 #define CSL_DSS_VID1_CLUT_2                                                    (0x00000268U)
 #define CSL_DSS_VID1_CLUT_3                                                    (0x0000026CU)
 #define CSL_DSS_VID1_CLUT_4                                                    (0x00000270U)
 #define CSL_DSS_VID1_CLUT_5                                                    (0x00000274U)
 #define CSL_DSS_VID1_CLUT_6                                                    (0x00000278U)
 #define CSL_DSS_VID1_CLUT_7                                                    (0x0000027CU)
 #define CSL_DSS_VID1_CLUT_8                                                    (0x00000280U)
 #define CSL_DSS_VID1_CLUT_9                                                    (0x00000284U)
 #define CSL_DSS_VID1_CLUT_10                                                   (0x00000288U)
 #define CSL_DSS_VID1_CLUT_11                                                   (0x0000028CU)
 #define CSL_DSS_VID1_CLUT_12                                                   (0x00000290U)
 #define CSL_DSS_VID1_CLUT_13                                                   (0x00000294U)
 #define CSL_DSS_VID1_CLUT_14                                                   (0x00000298U)
 #define CSL_DSS_VID1_CLUT_15                                                   (0x0000029CU)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES                                         (0x000002A0U)
 #define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE                                     (0x000002A4U)
 #define CSL_DSS_VID1_SAFETY_POSITION                                           (0x000002A8U)
 #define CSL_DSS_VID1_SAFETY_REF_SIGNATURE                                      (0x000002ACU)
 #define CSL_DSS_VID1_SAFETY_SIZE                                               (0x000002B0U)
 #define CSL_DSS_VID1_SAFETY_LFSR_SEED                                          (0x000002B4U)
 #define CSL_DSS_VID1_LUMAKEY                                                   (0x000002B8U)
 #define CSL_DSS_VID1_DMA_BUFSIZE                                               (0x000002BCU)
 #define CSL_DSS_VID1_CROP                                                      (0x000002C0U)
 #define CSL_DSS_VID1_SECURE                                                    (0x000002C4U)
 #define CSL_DSS_VID1_PIPE_GO                                                   (0x000002C8U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* ACCUH_0 */

 #define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MASK                               (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MAX                                (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUH_0_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID1_ACCUH_0_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID1_ACCUH_0_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUH_1 */

 #define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MASK                               (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MAX                                (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUH_1_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID1_ACCUH_1_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID1_ACCUH_1_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUH2_0 */

 #define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MASK                              (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_SHIFT                             (0x00000000U)
 #define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MAX                               (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUH2_0_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID1_ACCUH2_0_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID1_ACCUH2_0_RESERVED_MAX                                     (0x000000FFU)

 /* ACCUH2_1 */

 #define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MASK                              (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_SHIFT                             (0x00000000U)
 #define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MAX                               (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUH2_1_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID1_ACCUH2_1_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID1_ACCUH2_1_RESERVED_MAX                                     (0x000000FFU)

 /* ACCUV_0 */

 #define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MASK                                 (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MAX                                  (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUV_0_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID1_ACCUV_0_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID1_ACCUV_0_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUV_1 */

 #define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MASK                                 (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MAX                                  (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUV_1_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID1_ACCUV_1_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID1_ACCUV_1_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUV2_0 */

 #define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MASK                                (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MAX                                 (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUV2_0_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID1_ACCUV2_0_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID1_ACCUV2_0_RESERVED_MAX                                     (0x000000FFU)

 /* ACCUV2_1 */

 #define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MASK                                (0x00FFFFFFU)
 #define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MAX                                 (0x00FFFFFFU)

 #define CSL_DSS_VID1_ACCUV2_1_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID1_ACCUV2_1_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID1_ACCUV2_1_RESERVED_MAX                                     (0x000000FFU)

 /* ATTRIBUTES */

 #define CSL_DSS_VID1_ATTRIBUTES_ENABLE_MASK                                    (0x00000001U)
 #define CSL_DSS_VID1_ATTRIBUTES_ENABLE_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEOENB                            (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEODIS                            (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_MASK                                    (0x0000007EU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_SHIFT                                   (0x00000001U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_MAX                                     (0x0000003FU)

 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444                         (0x0U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444                         (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444                         (0x2U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB16_565                           (0x3U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR16_565                           (0x4U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555                         (0x5U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555                         (0x6U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888                         (0x7U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888                         (0x8U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888                         (0x9U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888                         (0xAU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB24P_888                          (0xBU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR24P_888                          (0xCU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010                      (0xEU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010                      (0xFU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616                     (0x10U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616                     (0x11U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP1                             (0x12U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP2                             (0x13U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP4                             (0x14U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP8                             (0x15U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB565A8                            (0x16U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR565A8                            (0x17U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444                         (0x20U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444                         (0x21U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444                         (0x22U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555                         (0x25U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555                         (0x26U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888                         (0x27U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888                         (0x28U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888                         (0x29U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888                         (0x2AU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010                      (0x2EU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010                      (0x2FU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616                     (0x30U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616                     (0x31U)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12                         (0x3CU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12                         (0x3DU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2                         (0x3EU)
 #define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY                         (0x3FU)

 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MASK                              (0x00000180U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_SHIFT                             (0x00000007U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MAX                               (0x00000003U)

 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC                    (0x0U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE                       (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE                       (0x2U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE                      (0x3U)

 #define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MASK                           (0x00000200U)
 #define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_SHIFT                          (0x00000009U)
 #define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MAX                            (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB                  (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS                  (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MASK                                (0x00000400U)
 #define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MAX                                 (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN                    (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS                   (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MASK                                 (0x00000800U)
 #define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MAX                                  (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE                        (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE                         (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_FLIP_MASK                                      (0x00001000U)
 #define CSL_DSS_VID1_ATTRIBUTES_FLIP_SHIFT                                     (0x0000000CU)
 #define CSL_DSS_VID1_ATTRIBUTES_FLIP_MAX                                       (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_FLIP                                  (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_NOFLIP                                (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_CROP_MASK                                      (0x00002000U)
 #define CSL_DSS_VID1_ATTRIBUTES_CROP_SHIFT                                     (0x0000000DU)
 #define CSL_DSS_VID1_ATTRIBUTES_CROP_MAX                                       (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPEN                                (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPDIS                               (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MASK                                 (0x0001C000U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MAX                                  (0x00000007U)

 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MASK                           (0x00020000U)
 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT                          (0x00000011U)
 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MAX                            (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN          (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS         (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MASK                                 (0x00040000U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_SHIFT                                (0x00000012U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MAX                                  (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MASK                                (0x00080000U)
 #define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_SHIFT                               (0x00000013U)
 #define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MAX                                 (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES                       (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL                          (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MASK                                 (0x00100000U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_SHIFT                                (0x00000014U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MAX                                  (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MASK                              (0x00200000U)
 #define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_SHIFT                             (0x00000015U)
 #define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MAX                               (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5                         (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3                         (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MASK                                 (0x00400000U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_SHIFT                                (0x00000016U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MAX                                  (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MASK                               (0x00800000U)
 #define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_SHIFT                              (0x00000017U)
 #define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MAX                                (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO                       (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO                     (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MASK                               (0x01000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_SHIFT                              (0x00000018U)
 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MAX                                (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB                 (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS                 (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MASK                                 (0x0E000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_SHIFT                                (0x00000019U)
 #define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MAX                                  (0x00000007U)

 #define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MASK                          (0x10000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT                         (0x0000001CU)
 #define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MAX                           (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA        (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA     (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK                         (0x20000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT                        (0x0000001DU)
 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX                          (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER                (0x0U)
 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER               (0x1U)

 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MASK                            (0x40000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_SHIFT                           (0x0000001EU)
 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MAX                             (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN                  (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS                 (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MASK                             (0x80000000U)
 #define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_SHIFT                            (0x0000001FU)
 #define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MAX                              (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN                    (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS                   (0x0U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MASK                                (0x00000001U)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB                          (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS                          (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MASK                              (0x0000000EU)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT                             (0x00000001U)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MAX                               (0x00000007U)

 #define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK                           (0x00000070U)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT                          (0x00000004U)
 #define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX                            (0x00000007U)

 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MASK                                 (0x00000180U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_SHIFT                                (0x00000007U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MAX                                  (0x00000003U)

 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_8B                               (0x0U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_10B                              (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_12B                              (0x2U)

 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MASK                                 (0x00000200U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_SHIFT                                (0x00000009U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MAX                                  (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_PACKED                           (0x0U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED                         (0x1U)

 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MASK                                (0x00000400U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MAX                                 (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB                             (0x1U)
 #define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB                             (0x0U)

 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MASK                                (0x0000F800U)
 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MASK                                (0x01F00000U)
 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MASK                                 (0x02000000U)
 #define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_SHIFT                                (0x00000019U)
 #define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MAX                                  (0x00000001U)

 #define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY                          (0x0U)
 #define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY                        (0x1U)

 #define CSL_DSS_VID1_ATTRIBUTES2_TAGS_MASK                                     (0x7C000000U)
 #define CSL_DSS_VID1_ATTRIBUTES2_TAGS_SHIFT                                    (0x0000001AU)
 #define CSL_DSS_VID1_ATTRIBUTES2_TAGS_MAX                                      (0x0000001FU)

 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MASK                                (0x80000000U)
 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_SHIFT                               (0x0000001FU)
 #define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MAX                                 (0x00000001U)

 /* BA_0 */

 #define CSL_DSS_VID1_BA_0_BA_MASK                                              (0xFFFFFFFFU)
 #define CSL_DSS_VID1_BA_0_BA_SHIFT                                             (0x00000000U)
 #define CSL_DSS_VID1_BA_0_BA_MAX                                               (0xFFFFFFFFU)

 /* BA_1 */

 #define CSL_DSS_VID1_BA_1_BA_MASK                                              (0xFFFFFFFFU)
 #define CSL_DSS_VID1_BA_1_BA_SHIFT                                             (0x00000000U)
 #define CSL_DSS_VID1_BA_1_BA_MAX                                               (0xFFFFFFFFU)

 /* BA_UV_0 */

 #define CSL_DSS_VID1_BA_UV_0_BA_MASK                                           (0xFFFFFFFFU)
 #define CSL_DSS_VID1_BA_UV_0_BA_SHIFT                                          (0x00000000U)
 #define CSL_DSS_VID1_BA_UV_0_BA_MAX                                            (0xFFFFFFFFU)

 /* BA_UV_1 */

 #define CSL_DSS_VID1_BA_UV_1_BA_MASK                                           (0xFFFFFFFFU)
 #define CSL_DSS_VID1_BA_UV_1_BA_SHIFT                                          (0x00000000U)
 #define CSL_DSS_VID1_BA_UV_1_BA_MAX                                            (0xFFFFFFFFU)

 /* BUF_SIZE_STATUS */

 #define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MASK                              (0x0000FFFFU)
 #define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MAX                               (0x0000FFFFU)

 #define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MASK                          (0xFFFF0000U)
 #define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_SHIFT                         (0x00000010U)
 #define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MAX                           (0x0000FFFFU)

 /* BUF_THRESHOLD */

 #define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK                        (0x0000FFFFU)
 #define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT                       (0x00000000U)
 #define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX                         (0x0000FFFFU)

 #define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK                       (0xFFFF0000U)
 #define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT                      (0x00000010U)
 #define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX                        (0x0000FFFFU)

 /* CSC_COEF0 */

 #define CSL_DSS_VID1_CSC_COEF0_C00_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID1_CSC_COEF0_C00_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF0_C00_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MASK                                (0x0000F800U)
 #define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID1_CSC_COEF0_C01_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID1_CSC_COEF0_C01_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF0_C01_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MASK                                (0xF8000000U)
 #define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MAX                                 (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VID1_CSC_COEF1_C02_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID1_CSC_COEF1_C02_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF1_C02_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MASK                                (0x0000F800U)
 #define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID1_CSC_COEF1_C10_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID1_CSC_COEF1_C10_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF1_C10_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MASK                                (0xF8000000U)
 #define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MAX                                 (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VID1_CSC_COEF2_C11_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID1_CSC_COEF2_C11_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF2_C11_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MASK                                (0x0000F800U)
 #define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID1_CSC_COEF2_C12_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID1_CSC_COEF2_C12_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF2_C12_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MASK                                (0xF8000000U)
 #define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MAX                                 (0x0000001FU)

 /* CSC_COEF3 */

 #define CSL_DSS_VID1_CSC_COEF3_C20_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID1_CSC_COEF3_C20_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF3_C20_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MASK                                (0x0000F800U)
 #define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID1_CSC_COEF3_C21_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID1_CSC_COEF3_C21_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF3_C21_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MASK                                (0xF8000000U)
 #define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MAX                                 (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VID1_CSC_COEF4_C22_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID1_CSC_COEF4_C22_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF4_C22_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MASK                                (0xFFFFF800U)
 #define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MAX                                 (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VID1_CSC_COEF5_RESERVED_MASK                                   (0x00000007U)
 #define CSL_DSS_VID1_CSC_COEF5_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF5_RESERVED_MAX                                    (0x00000007U)

 #define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_SHIFT                                (0x00000003U)
 #define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VID1_CSC_COEF5_RESERVED1_MASK                                  (0x00070000U)
 #define CSL_DSS_VID1_CSC_COEF5_RESERVED1_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF5_RESERVED1_MAX                                   (0x00000007U)

 #define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_SHIFT                                (0x00000013U)
 #define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MAX                                  (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VID1_CSC_COEF6_RESERVED_MASK                                   (0x00000007U)
 #define CSL_DSS_VID1_CSC_COEF6_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF6_RESERVED_MAX                                    (0x00000007U)

 #define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_SHIFT                                (0x00000003U)
 #define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VID1_CSC_COEF6_RESERVED1_MASK                                  (0x00070000U)
 #define CSL_DSS_VID1_CSC_COEF6_RESERVED1_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF6_RESERVED1_MAX                                   (0x00000007U)

 #define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MASK                                (0xFFF80000U)
 #define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_SHIFT                               (0x00000013U)
 #define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MAX                                 (0x00001FFFU)

 /* FIRH */

 #define CSL_DSS_VID1_FIRH_FIRHINC_MASK                                         (0x00FFFFFFU)
 #define CSL_DSS_VID1_FIRH_FIRHINC_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VID1_FIRH_FIRHINC_MAX                                          (0x00FFFFFFU)

 #define CSL_DSS_VID1_FIRH_RESERVED_MASK                                        (0xFF000000U)
 #define CSL_DSS_VID1_FIRH_RESERVED_SHIFT                                       (0x00000018U)
 #define CSL_DSS_VID1_FIRH_RESERVED_MAX                                         (0x000000FFU)

 /* FIRH2 */

 #define CSL_DSS_VID1_FIRH2_FIRHINC_MASK                                        (0x00FFFFFFU)
 #define CSL_DSS_VID1_FIRH2_FIRHINC_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_FIRH2_FIRHINC_MAX                                         (0x00FFFFFFU)

 #define CSL_DSS_VID1_FIRH2_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_VID1_FIRH2_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_VID1_FIRH2_RESERVED_MAX                                        (0x000000FFU)

 /* FIRV */

 #define CSL_DSS_VID1_FIRV_FIRVINC_MASK                                         (0x00FFFFFFU)
 #define CSL_DSS_VID1_FIRV_FIRVINC_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VID1_FIRV_FIRVINC_MAX                                          (0x00FFFFFFU)

 #define CSL_DSS_VID1_FIRV_RESERVED_MASK                                        (0xFF000000U)
 #define CSL_DSS_VID1_FIRV_RESERVED_SHIFT                                       (0x00000018U)
 #define CSL_DSS_VID1_FIRV_RESERVED_MAX                                         (0x000000FFU)

 /* FIRV2 */

 #define CSL_DSS_VID1_FIRV2_FIRVINC_MASK                                        (0x00FFFFFFU)
 #define CSL_DSS_VID1_FIRV2_FIRVINC_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_FIRV2_FIRVINC_MAX                                         (0x00FFFFFFU)

 #define CSL_DSS_VID1_FIRV2_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_VID1_FIRV2_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_VID1_FIRV2_RESERVED_MAX                                        (0x000000FFU)

 /* FIR_COEF_H0 */

 #define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MASK                                   (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MAX                                    (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MASK                                (0x3FFFFC00U)
 #define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MAX                                 (0x000FFFFFU)

 #define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MASK                                 (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_SHIFT                                (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MAX                                  (0x00000003U)

 /* FIR_COEF_H0_C */

 #define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MASK                                 (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MAX                                  (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MASK                              (0x3FFFFC00U)
 #define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_SHIFT                             (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MAX                               (0x000FFFFFU)

 #define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MASK                               (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_SHIFT                              (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MAX                                (0x00000003U)

 /* FIR_COEF_H12 */

 #define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MASK                               (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MAX                                (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MASK                                  (0x000FFC00U)
 #define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MASK                                  (0x3FF00000U)
 #define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_SHIFT                                 (0x00000014U)
 #define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MASK                                (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_SHIFT                               (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MAX                                 (0x00000003U)

 /* FIR_COEF_H12_C */

 #define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MASK                             (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MAX                              (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MASK                                (0x000FFC00U)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MASK                                (0x3FF00000U)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MASK                              (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_SHIFT                             (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MAX                               (0x00000003U)

 /* FIR_COEF_V0 */

 #define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MASK                                   (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MAX                                    (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MASK                                (0x3FFFFC00U)
 #define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MAX                                 (0x000FFFFFU)

 #define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MASK                                 (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_SHIFT                                (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MAX                                  (0x00000003U)

 /* FIR_COEF_V0_C */

 #define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MASK                                 (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MAX                                  (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MASK                              (0x3FFFFC00U)
 #define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_SHIFT                             (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MAX                               (0x000FFFFFU)

 #define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MASK                               (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_SHIFT                              (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MAX                                (0x00000003U)

 /* FIR_COEF_V12 */

 #define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MASK                               (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MAX                                (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MASK                                  (0x000FFC00U)
 #define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MASK                                  (0x3FF00000U)
 #define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_SHIFT                                 (0x00000014U)
 #define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MASK                                (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_SHIFT                               (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MAX                                 (0x00000003U)

 /* FIR_COEF_V12_C */

 #define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MASK                             (0x000003FFU)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MAX                              (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MASK                                (0x000FFC00U)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MASK                                (0x3FF00000U)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MASK                              (0xC0000000U)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_SHIFT                             (0x0000001EU)
 #define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MAX                               (0x00000003U)

 /* GLOBAL_ALPHA */

 #define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MASK                             (0x000000FFU)
 #define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MAX                              (0x000000FFU)

 #define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MASK                                (0xFFFFFF00U)
 #define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_SHIFT                               (0x00000008U)
 #define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MAX                                 (0x00FFFFFFU)

 /* MFLAG_THRESHOLD */

 #define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MASK                             (0x0000FFFFU)
 #define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MAX                              (0x0000FFFFU)

 #define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MASK                             (0xFFFF0000U)
 #define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT                            (0x00000010U)
 #define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MAX                              (0x0000FFFFU)

 /* PICTURE_SIZE */

 #define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MASK                                (0x00003FFFU)
 #define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MASK                                (0x3FFF0000U)
 #define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_SHIFT                               (0x00000010U)
 #define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MAX                                 (0x00003FFFU)

 /* PIXEL_INC */

 #define CSL_DSS_VID1_PIXEL_INC_PIXELINC_MASK                                   (0x000000FFU)
 #define CSL_DSS_VID1_PIXEL_INC_PIXELINC_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_PIXEL_INC_PIXELINC_MAX                                    (0x000000FFU)

 #define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MASK                                (0xFFFFFF00U)
 #define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_SHIFT                               (0x00000008U)
 #define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MAX                                 (0x00FFFFFFU)

 /* PRELOAD */

 #define CSL_DSS_VID1_PRELOAD_PRELOAD_MASK                                      (0x00000FFFU)
 #define CSL_DSS_VID1_PRELOAD_PRELOAD_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_PRELOAD_PRELOAD_MAX                                       (0x00000FFFU)

 #define CSL_DSS_VID1_PRELOAD_RESERVED_212_MASK                                 (0xFFFFF000U)
 #define CSL_DSS_VID1_PRELOAD_RESERVED_212_SHIFT                                (0x0000000CU)
 #define CSL_DSS_VID1_PRELOAD_RESERVED_212_MAX                                  (0x000FFFFFU)

 /* ROW_INC */

 #define CSL_DSS_VID1_ROW_INC_ROWINC_MASK                                       (0xFFFFFFFFU)
 #define CSL_DSS_VID1_ROW_INC_ROWINC_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_ROW_INC_ROWINC_MAX                                        (0xFFFFFFFFU)

 /* SIZE */

 #define CSL_DSS_VID1_SIZE_SIZEX_MASK                                           (0x00003FFFU)
 #define CSL_DSS_VID1_SIZE_SIZEX_SHIFT                                          (0x00000000U)
 #define CSL_DSS_VID1_SIZE_SIZEX_MAX                                            (0x00003FFFU)

 #define CSL_DSS_VID1_SIZE_SIZEY_MASK                                           (0x3FFF0000U)
 #define CSL_DSS_VID1_SIZE_SIZEY_SHIFT                                          (0x00000010U)
 #define CSL_DSS_VID1_SIZE_SIZEY_MAX                                            (0x00003FFFU)

 /* BA_EXT_0 */

 #define CSL_DSS_VID1_BA_EXT_0_BA_EXT_MASK                                      (0x0000FFFFU)
 #define CSL_DSS_VID1_BA_EXT_0_BA_EXT_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_BA_EXT_0_BA_EXT_MAX                                       (0x0000FFFFU)

 #define CSL_DSS_VID1_BA_EXT_0_RESERVED_MASK                                    (0xFFFF0000U)
 #define CSL_DSS_VID1_BA_EXT_0_RESERVED_SHIFT                                   (0x00000010U)
 #define CSL_DSS_VID1_BA_EXT_0_RESERVED_MAX                                     (0x0000FFFFU)

 /* BA_EXT_1 */

 #define CSL_DSS_VID1_BA_EXT_1_BA_EXT_MASK                                      (0x0000FFFFU)
 #define CSL_DSS_VID1_BA_EXT_1_BA_EXT_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_BA_EXT_1_BA_EXT_MAX                                       (0x0000FFFFU)

 #define CSL_DSS_VID1_BA_EXT_1_RESERVED_MASK                                    (0xFFFF0000U)
 #define CSL_DSS_VID1_BA_EXT_1_RESERVED_SHIFT                                   (0x00000010U)
 #define CSL_DSS_VID1_BA_EXT_1_RESERVED_MAX                                     (0x0000FFFFU)

 /* BA_UV_EXT_0 */

 #define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MASK                                (0x0000FFFFU)
 #define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MAX                                 (0x0000FFFFU)

 #define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MASK                                 (0xFFFF0000U)
 #define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_SHIFT                                (0x00000010U)
 #define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MAX                                  (0x0000FFFFU)

 /* BA_UV_EXT_1 */

 #define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MASK                                (0x0000FFFFU)
 #define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MAX                                 (0x0000FFFFU)

 #define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MASK                                 (0xFFFF0000U)
 #define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_SHIFT                                (0x00000010U)
 #define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MAX                                  (0x0000FFFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VID1_CSC_COEF7_RESERVED_MASK                                   (0x00000007U)
 #define CSL_DSS_VID1_CSC_COEF7_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_CSC_COEF7_RESERVED_MAX                                    (0x00000007U)

 #define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MASK                                (0x0000FFF8U)
 #define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_SHIFT                               (0x00000003U)
 #define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MAX                                 (0x00001FFFU)

 #define CSL_DSS_VID1_CSC_COEF7_RESERVED1_MASK                                  (0x00070000U)
 #define CSL_DSS_VID1_CSC_COEF7_RESERVED1_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VID1_CSC_COEF7_RESERVED1_MAX                                   (0x00000007U)

 #define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MASK                                (0xFFF80000U)
 #define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_SHIFT                               (0x00000013U)
 #define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MAX                                 (0x00001FFFU)

 /* ROW_INC_UV */

 #define CSL_DSS_VID1_ROW_INC_UV_ROWINC_MASK                                    (0xFFFFFFFFU)
 #define CSL_DSS_VID1_ROW_INC_UV_ROWINC_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VID1_ROW_INC_UV_ROWINC_MAX                                     (0xFFFFFFFFU)

 /* TILE */

 #define CSL_DSS_VID1_TILE_TILEINDEX_MASK                                       (0x007FFFFFU)
 #define CSL_DSS_VID1_TILE_TILEINDEX_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_TILE_TILEINDEX_MAX                                        (0x007FFFFFU)

 /* TILE2 */

 #define CSL_DSS_VID1_TILE2_NUM_TILES_MASK                                      (0x007FFFFFU)
 #define CSL_DSS_VID1_TILE2_NUM_TILES_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_TILE2_NUM_TILES_MAX                                       (0x007FFFFFU)

 #define CSL_DSS_VID1_TILE2_RESERVED_MASK                                       (0xFF800000U)
 #define CSL_DSS_VID1_TILE2_RESERVED_SHIFT                                      (0x00000017U)
 #define CSL_DSS_VID1_TILE2_RESERVED_MAX                                        (0x000001FFU)

 /* FBDC_ATTRIBUTES */

 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MASK                               (0x00000001U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MASK                               (0x000000FEU)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_SHIFT                              (0x00000001U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MAX                                (0x0000007FU)

 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8                       (0xCU)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10                    (0xEU)

 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MASK                             (0x00000300U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_SHIFT                            (0x00000008U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MAX                              (0x00000003U)

 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4                    (0x2U)
 #define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2                    (0x3U)

 /* FBDC_CLEAR_COLOR */

 #define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK                          (0xFFFFFFFFU)
 #define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT                         (0x00000000U)
 #define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX                           (0xFFFFFFFFU)

 /* CLUT_0 */

 #define CSL_DSS_VID1_CLUT_0_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_0_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_0_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_0_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_0_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_0_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_0_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_0_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_0_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_0_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_0_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_0_INDEX_MAX                                          (0x00000001U)

 /* CLUT_1 */

 #define CSL_DSS_VID1_CLUT_1_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_1_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_1_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_1_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_1_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_1_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_1_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_1_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_1_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_1_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_1_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_1_INDEX_MAX                                          (0x00000001U)

 /* CLUT_2 */

 #define CSL_DSS_VID1_CLUT_2_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_2_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_2_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_2_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_2_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_2_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_2_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_2_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_2_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_2_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_2_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_2_INDEX_MAX                                          (0x00000001U)

 /* CLUT_3 */

 #define CSL_DSS_VID1_CLUT_3_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_3_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_3_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_3_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_3_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_3_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_3_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_3_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_3_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_3_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_3_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_3_INDEX_MAX                                          (0x00000001U)

 /* CLUT_4 */

 #define CSL_DSS_VID1_CLUT_4_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_4_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_4_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_4_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_4_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_4_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_4_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_4_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_4_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_4_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_4_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_4_INDEX_MAX                                          (0x00000001U)

 /* CLUT_5 */

 #define CSL_DSS_VID1_CLUT_5_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_5_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_5_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_5_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_5_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_5_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_5_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_5_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_5_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_5_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_5_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_5_INDEX_MAX                                          (0x00000001U)

 /* CLUT_6 */

 #define CSL_DSS_VID1_CLUT_6_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_6_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_6_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_6_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_6_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_6_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_6_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_6_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_6_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_6_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_6_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_6_INDEX_MAX                                          (0x00000001U)

 /* CLUT_7 */

 #define CSL_DSS_VID1_CLUT_7_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_7_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_7_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_7_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_7_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_7_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_7_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_7_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_7_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_7_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_7_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_7_INDEX_MAX                                          (0x00000001U)

 /* CLUT_8 */

 #define CSL_DSS_VID1_CLUT_8_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_8_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_8_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_8_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_8_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_8_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_8_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_8_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_8_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_8_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_8_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_8_INDEX_MAX                                          (0x00000001U)

 /* CLUT_9 */

 #define CSL_DSS_VID1_CLUT_9_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_9_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID1_CLUT_9_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_9_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_9_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_9_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_9_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_9_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID1_CLUT_9_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_9_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID1_CLUT_9_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_9_INDEX_MAX                                          (0x00000001U)

 /* CLUT_10 */

 #define CSL_DSS_VID1_CLUT_10_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_10_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_CLUT_10_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_10_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_10_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_10_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_10_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_10_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID1_CLUT_10_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_10_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID1_CLUT_10_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_10_INDEX_MAX                                         (0x00000001U)

 /* CLUT_11 */

 #define CSL_DSS_VID1_CLUT_11_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_11_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_CLUT_11_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_11_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_11_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_11_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_11_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_11_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID1_CLUT_11_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_11_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID1_CLUT_11_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_11_INDEX_MAX                                         (0x00000001U)

 /* CLUT_12 */

 #define CSL_DSS_VID1_CLUT_12_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_12_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_CLUT_12_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_12_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_12_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_12_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_12_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_12_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID1_CLUT_12_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_12_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID1_CLUT_12_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_12_INDEX_MAX                                         (0x00000001U)

 /* CLUT_13 */

 #define CSL_DSS_VID1_CLUT_13_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_13_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_CLUT_13_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_13_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_13_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_13_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_13_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_13_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID1_CLUT_13_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_13_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID1_CLUT_13_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_13_INDEX_MAX                                         (0x00000001U)

 /* CLUT_14 */

 #define CSL_DSS_VID1_CLUT_14_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_14_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_CLUT_14_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_14_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_14_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_14_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_14_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_14_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID1_CLUT_14_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_14_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID1_CLUT_14_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_14_INDEX_MAX                                         (0x00000001U)

 /* CLUT_15 */

 #define CSL_DSS_VID1_CLUT_15_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID1_CLUT_15_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID1_CLUT_15_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_15_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID1_CLUT_15_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID1_CLUT_15_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_15_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID1_CLUT_15_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID1_CLUT_15_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID1_CLUT_15_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID1_CLUT_15_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID1_CLUT_15_INDEX_MAX                                         (0x00000001U)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MASK                             (0x00000001U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MAX                              (0x00000001U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                        (0x00000002U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                       (0x00000001U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                         (0x00000001U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK               (0x1U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE             (0x0U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                         (0x00000004U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                        (0x00000002U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                          (0x00000001U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                   (0x1U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                  (0x0U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MASK                          (0x000007F8U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                         (0x00000003U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MAX                           (0x000000FFU)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                          (0x00001800U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                         (0x0000000BU)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                           (0x00000003U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE                   (0x0U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                      (0x1U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                       (0x2U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                  (0x3U)

 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MASK                           (0xFFFFE000U)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_SHIFT                          (0x0000000DU)
 #define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MAX                            (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                      (0xFFFFFFFFU)
 #define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                     (0x00000000U)
 #define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                       (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VID1_SAFETY_POSITION_POSX_MASK                                 (0x00003FFFU)
 #define CSL_DSS_VID1_SAFETY_POSITION_POSX_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID1_SAFETY_POSITION_POSX_MAX                                  (0x00003FFFU)

 #define CSL_DSS_VID1_SAFETY_POSITION_POSY_MASK                                 (0x3FFF0000U)
 #define CSL_DSS_VID1_SAFETY_POSITION_POSY_SHIFT                                (0x00000010U)
 #define CSL_DSS_VID1_SAFETY_POSITION_POSY_MAX                                  (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                       (0xFFFFFFFFU)
 #define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                      (0x00000000U)
 #define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                        (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MASK                                    (0x00003FFFU)
 #define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MAX                                     (0x00003FFFU)

 #define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MASK                                    (0x3FFF0000U)
 #define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_SHIFT                                   (0x00000010U)
 #define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MAX                                     (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MASK                                (0xFFFFFFFFU)
 #define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MAX                                 (0xFFFFFFFFU)

 /* LUMAKEY */

 #define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MASK                                   (0x00000FFFU)
 #define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MAX                                    (0x00000FFFU)

 #define CSL_DSS_VID1_LUMAKEY_RESERVED_MASK                                     (0x0000F000U)
 #define CSL_DSS_VID1_LUMAKEY_RESERVED_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_VID1_LUMAKEY_RESERVED_MAX                                      (0x0000000FU)

 #define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MASK                                   (0x0FFF0000U)
 #define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MAX                                    (0x00000FFFU)

 #define CSL_DSS_VID1_LUMAKEY_RESERVED1_MASK                                    (0xF0000000U)
 #define CSL_DSS_VID1_LUMAKEY_RESERVED1_SHIFT                                   (0x0000001CU)
 #define CSL_DSS_VID1_LUMAKEY_RESERVED1_MAX                                     (0x0000000FU)

 /* DMA_BUFSIZE */

 #define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MASK                                  (0x0000001FU)
 #define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MAX                                   (0x0000001FU)

 #define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MASK                                 (0xFFFFFFE0U)
 #define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_SHIFT                                (0x00000005U)
 #define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MAX                                  (0x07FFFFFFU)

 /* CROP */

 #define CSL_DSS_VID1_CROP_CROPLEFT_MASK                                        (0x0000001FU)
 #define CSL_DSS_VID1_CROP_CROPLEFT_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_CROP_CROPLEFT_MAX                                         (0x0000001FU)

 #define CSL_DSS_VID1_CROP_CROPRIGHT_MASK                                       (0x00001F00U)
 #define CSL_DSS_VID1_CROP_CROPRIGHT_SHIFT                                      (0x00000008U)
 #define CSL_DSS_VID1_CROP_CROPRIGHT_MAX                                        (0x0000001FU)

 #define CSL_DSS_VID1_CROP_CROPTOP_MASK                                         (0x001F0000U)
 #define CSL_DSS_VID1_CROP_CROPTOP_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VID1_CROP_CROPTOP_MAX                                          (0x0000001FU)

 #define CSL_DSS_VID1_CROP_CROPBOTTOM_MASK                                      (0x1F000000U)
 #define CSL_DSS_VID1_CROP_CROPBOTTOM_SHIFT                                     (0x00000018U)
 #define CSL_DSS_VID1_CROP_CROPBOTTOM_MAX                                       (0x0000001FU)

 /* SECURE */

 #define CSL_DSS_VID1_SECURE_SECURE_MASK                                        (0x00000001U)
 #define CSL_DSS_VID1_SECURE_SECURE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_SECURE_SECURE_MAX                                         (0x00000001U)

 #define CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREDIS                               (0x0U)
 #define CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREEN                                (0x1U)

 #define CSL_DSS_VID1_SECURE_RESERVED_MASK                                      (0xFFFFFFFEU)
 #define CSL_DSS_VID1_SECURE_RESERVED_SHIFT                                     (0x00000001U)
 #define CSL_DSS_VID1_SECURE_RESERVED_MAX                                       (0x7FFFFFFFU)

 /* PIPE_GO */

 #define CSL_DSS_VID1_PIPE_GO_GOBIT_MASK                                        (0x00000001U)
 #define CSL_DSS_VID1_PIPE_GO_GOBIT_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID1_PIPE_GO_GOBIT_MAX                                         (0x00000001U)

 #define CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_HFUISR                                  (0x0U)
 #define CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_UFPSR                                   (0x1U)

 #define CSL_DSS_VID1_PIPE_GO_RESERVED_MASK                                     (0xFFFFFFFEU)
 #define CSL_DSS_VID1_PIPE_GO_RESERVED_SHIFT                                    (0x00000001U)
 #define CSL_DSS_VID1_PIPE_GO_RESERVED_MAX                                      (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VID2 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t ACCUH_0;                   /* ACCUH_0 */
     volatile uint32_t ACCUH_1;                   /* ACCUH_1 */
     volatile uint32_t ACCUH2_0;                  /* ACCUH2_0 */
     volatile uint32_t ACCUH2_1;                  /* ACCUH2_1 */
     volatile uint32_t ACCUV_0;                   /* ACCUV_0 */
     volatile uint32_t ACCUV_1;                   /* ACCUV_1 */
     volatile uint32_t ACCUV2_0;                  /* ACCUV2_0 */
     volatile uint32_t ACCUV2_1;                  /* ACCUV2_1 */
     volatile uint32_t ATTRIBUTES;                /* ATTRIBUTES */
     volatile uint32_t ATTRIBUTES2;               /* ATTRIBUTES2 */
     volatile uint32_t BA_0;                      /* BA_0 */
     volatile uint32_t BA_1;                      /* BA_1 */
     volatile uint32_t BA_UV_0;                   /* BA_UV_0 */
     volatile uint32_t BA_UV_1;                   /* BA_UV_1 */
     volatile uint32_t BUF_SIZE_STATUS;           /* BUF_SIZE_STATUS */
     volatile uint32_t BUF_THRESHOLD;             /* BUF_THRESHOLD */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t FIRH;                      /* FIRH */
     volatile uint32_t FIRH2;                     /* FIRH2 */
     volatile uint32_t FIRV;                      /* FIRV */
     volatile uint32_t FIRV2;                     /* FIRV2 */
     volatile uint32_t FIR_COEF_H0[9U];           /* FIR_COEF_H0 0..8 */
     volatile uint32_t FIR_COEF_H0_C[9U];         /* FIR_COEF_H0_C 0..8 */
     volatile uint32_t FIR_COEF_H12[16U];         /* FIR_COEF_H12 0..15 */
     volatile uint32_t FIR_COEF_H12_C[16U];       /* FIR_COEF_H12_C 0..15 */
     volatile uint32_t FIR_COEF_V0[9U];           /* FIR_COEF_V0 0..8 */
     volatile uint32_t FIR_COEF_V0_C[9U];         /* FIR_COEF_V0_C 0..8 */
     volatile uint32_t FIR_COEF_V12[16U];         /* FIR_COEF_V12 0..15 */
     volatile uint32_t FIR_COEF_V12_C[16U];       /* FIR_COEF_V12_C 0..15 */
     volatile uint32_t GLOBAL_ALPHA;              /* GLOBAL_ALPHA */
     volatile uint8_t  Resv_520[8];
     volatile uint32_t MFLAG_THRESHOLD;           /* MFLAG_THRESHOLD */
     volatile uint32_t PICTURE_SIZE;              /* PICTURE_SIZE */
     volatile uint32_t PIXEL_INC;                 /* PIXEL_INC */
     volatile uint8_t  Resv_536[4];
     volatile uint32_t PRELOAD;                   /* PRELOAD */
     volatile uint32_t ROW_INC;                   /* ROW_INC */
     volatile uint32_t SIZE;                      /* SIZE */
     volatile uint8_t  Resv_556[8];
     volatile uint32_t BA_EXT_0;                  /* BA_EXT_0 */
     volatile uint32_t BA_EXT_1;                  /* BA_EXT_1 */
     volatile uint32_t BA_UV_EXT_0;               /* BA_UV_EXT_0 */
     volatile uint32_t BA_UV_EXT_1;               /* BA_UV_EXT_1 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint8_t  Resv_584[8];
     volatile uint32_t ROW_INC_UV;                /* ROW_INC_UV */
     volatile uint32_t TILE;                      /* TILE */
     volatile uint32_t TILE2;                     /* TILE2 */
     volatile uint32_t FBDC_ATTRIBUTES;           /* FBDC_ATTRIBUTES */
     volatile uint32_t FBDC_CLEAR_COLOR;          /* FBDC_CLEAR_COLOR */
     volatile uint8_t  Resv_608[4];
     volatile uint32_t CLUT_0;                    /* CLUT_0 */
     volatile uint32_t CLUT_1;                    /* CLUT_1 */
     volatile uint32_t CLUT_2;                    /* CLUT_2 */
     volatile uint32_t CLUT_3;                    /* CLUT_3 */
     volatile uint32_t CLUT_4;                    /* CLUT_4 */
     volatile uint32_t CLUT_5;                    /* CLUT_5 */
     volatile uint32_t CLUT_6;                    /* CLUT_6 */
     volatile uint32_t CLUT_7;                    /* CLUT_7 */
     volatile uint32_t CLUT_8;                    /* CLUT_8 */
     volatile uint32_t CLUT_9;                    /* CLUT_9 */
     volatile uint32_t CLUT_10;                   /* CLUT_10 */
     volatile uint32_t CLUT_11;                   /* CLUT_11 */
     volatile uint32_t CLUT_12;                   /* CLUT_12 */
     volatile uint32_t CLUT_13;                   /* CLUT_13 */
     volatile uint32_t CLUT_14;                   /* CLUT_14 */
     volatile uint32_t CLUT_15;                   /* CLUT_15 */
     volatile uint32_t SAFETY_ATTRIBUTES;         /* SAFETY_ATTRIBUTES */
     volatile uint32_t SAFETY_CAPT_SIGNATURE;     /* SAFETY_CAPT_SIGNATURE */
     volatile uint32_t SAFETY_POSITION;           /* SAFETY_POSITION */
     volatile uint32_t SAFETY_REF_SIGNATURE;      /* SAFETY_REF_SIGNATURE */
     volatile uint32_t SAFETY_SIZE;               /* SAFETY_SIZE */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint32_t LUMAKEY;                   /* LUMAKEY */
     volatile uint32_t DMA_BUFSIZE;               /* DMA_BUFSIZE */
     volatile uint32_t CROP;                      /* CROP */
     volatile uint32_t SECURE;                    /* SECURE */
     volatile uint32_t PIPE_GO;                   /* PIPE_GO */
 } CSL_dss_vid2Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VID2_ACCUH_0                                                   (0x00000000U)
 #define CSL_DSS_VID2_ACCUH_1                                                   (0x00000004U)
 #define CSL_DSS_VID2_ACCUH2_0                                                  (0x00000008U)
 #define CSL_DSS_VID2_ACCUH2_1                                                  (0x0000000CU)
 #define CSL_DSS_VID2_ACCUV_0                                                   (0x00000010U)
 #define CSL_DSS_VID2_ACCUV_1                                                   (0x00000014U)
 #define CSL_DSS_VID2_ACCUV2_0                                                  (0x00000018U)
 #define CSL_DSS_VID2_ACCUV2_1                                                  (0x0000001CU)
 #define CSL_DSS_VID2_ATTRIBUTES                                                (0x00000020U)
 #define CSL_DSS_VID2_ATTRIBUTES2                                               (0x00000024U)
 #define CSL_DSS_VID2_BA_0                                                      (0x00000028U)
 #define CSL_DSS_VID2_BA_1                                                      (0x0000002CU)
 #define CSL_DSS_VID2_BA_UV_0                                                   (0x00000030U)
 #define CSL_DSS_VID2_BA_UV_1                                                   (0x00000034U)
 #define CSL_DSS_VID2_BUF_SIZE_STATUS                                           (0x00000038U)
 #define CSL_DSS_VID2_BUF_THRESHOLD                                             (0x0000003CU)
 #define CSL_DSS_VID2_CSC_COEF0                                                 (0x00000040U)
 #define CSL_DSS_VID2_CSC_COEF1                                                 (0x00000044U)
 #define CSL_DSS_VID2_CSC_COEF2                                                 (0x00000048U)
 #define CSL_DSS_VID2_CSC_COEF3                                                 (0x0000004CU)
 #define CSL_DSS_VID2_CSC_COEF4                                                 (0x00000050U)
 #define CSL_DSS_VID2_CSC_COEF5                                                 (0x00000054U)
 #define CSL_DSS_VID2_CSC_COEF6                                                 (0x00000058U)
 #define CSL_DSS_VID2_FIRH                                                      (0x0000005CU)
 #define CSL_DSS_VID2_FIRH2                                                     (0x00000060U)
 #define CSL_DSS_VID2_FIRV                                                      (0x00000064U)
 #define CSL_DSS_VID2_FIRV2                                                     (0x00000068U)
 #define CSL_DSS_VID2_FIR_COEF_H0(index)                                        (0x0000006CU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_H0_C(index)                                      (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_H12(index)                                       (0x000000B4U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_H12_C(index)                                     (0x000000F4U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_V0(index)                                        (0x00000134U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_V0_C(index)                                      (0x00000158U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_V12(index)                                       (0x0000017CU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_FIR_COEF_V12_C(index)                                     (0x000001BCU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VID2_GLOBAL_ALPHA                                              (0x000001FCU)
 #define CSL_DSS_VID2_MFLAG_THRESHOLD                                           (0x00000208U)
 #define CSL_DSS_VID2_PICTURE_SIZE                                              (0x0000020CU)
 #define CSL_DSS_VID2_PIXEL_INC                                                 (0x00000210U)
 #define CSL_DSS_VID2_PRELOAD                                                   (0x00000218U)
 #define CSL_DSS_VID2_ROW_INC                                                   (0x0000021CU)
 #define CSL_DSS_VID2_SIZE                                                      (0x00000220U)
 #define CSL_DSS_VID2_BA_EXT_0                                                  (0x0000022CU)
 #define CSL_DSS_VID2_BA_EXT_1                                                  (0x00000230U)
 #define CSL_DSS_VID2_BA_UV_EXT_0                                               (0x00000234U)
 #define CSL_DSS_VID2_BA_UV_EXT_1                                               (0x00000238U)
 #define CSL_DSS_VID2_CSC_COEF7                                                 (0x0000023CU)
 #define CSL_DSS_VID2_ROW_INC_UV                                                (0x00000248U)
 #define CSL_DSS_VID2_TILE                                                      (0x0000024CU)
 #define CSL_DSS_VID2_TILE2                                                     (0x00000250U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES                                           (0x00000254U)
 #define CSL_DSS_VID2_FBDC_CLEAR_COLOR                                          (0x00000258U)
 #define CSL_DSS_VID2_CLUT_0                                                    (0x00000260U)
 #define CSL_DSS_VID2_CLUT_1                                                    (0x00000264U)
 #define CSL_DSS_VID2_CLUT_2                                                    (0x00000268U)
 #define CSL_DSS_VID2_CLUT_3                                                    (0x0000026CU)
 #define CSL_DSS_VID2_CLUT_4                                                    (0x00000270U)
 #define CSL_DSS_VID2_CLUT_5                                                    (0x00000274U)
 #define CSL_DSS_VID2_CLUT_6                                                    (0x00000278U)
 #define CSL_DSS_VID2_CLUT_7                                                    (0x0000027CU)
 #define CSL_DSS_VID2_CLUT_8                                                    (0x00000280U)
 #define CSL_DSS_VID2_CLUT_9                                                    (0x00000284U)
 #define CSL_DSS_VID2_CLUT_10                                                   (0x00000288U)
 #define CSL_DSS_VID2_CLUT_11                                                   (0x0000028CU)
 #define CSL_DSS_VID2_CLUT_12                                                   (0x00000290U)
 #define CSL_DSS_VID2_CLUT_13                                                   (0x00000294U)
 #define CSL_DSS_VID2_CLUT_14                                                   (0x00000298U)
 #define CSL_DSS_VID2_CLUT_15                                                   (0x0000029CU)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES                                         (0x000002A0U)
 #define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE                                     (0x000002A4U)
 #define CSL_DSS_VID2_SAFETY_POSITION                                           (0x000002A8U)
 #define CSL_DSS_VID2_SAFETY_REF_SIGNATURE                                      (0x000002ACU)
 #define CSL_DSS_VID2_SAFETY_SIZE                                               (0x000002B0U)
 #define CSL_DSS_VID2_SAFETY_LFSR_SEED                                          (0x000002B4U)
 #define CSL_DSS_VID2_LUMAKEY                                                   (0x000002B8U)
 #define CSL_DSS_VID2_DMA_BUFSIZE                                               (0x000002BCU)
 #define CSL_DSS_VID2_CROP                                                      (0x000002C0U)
 #define CSL_DSS_VID2_SECURE                                                    (0x000002C4U)
 #define CSL_DSS_VID2_PIPE_GO                                                   (0x000002C8U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* ACCUH_0 */

 #define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MASK                               (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MAX                                (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUH_0_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID2_ACCUH_0_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID2_ACCUH_0_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUH_1 */

 #define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MASK                               (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MAX                                (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUH_1_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID2_ACCUH_1_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID2_ACCUH_1_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUH2_0 */

 #define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MASK                              (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_SHIFT                             (0x00000000U)
 #define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MAX                               (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUH2_0_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID2_ACCUH2_0_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID2_ACCUH2_0_RESERVED_MAX                                     (0x000000FFU)

 /* ACCUH2_1 */

 #define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MASK                              (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_SHIFT                             (0x00000000U)
 #define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MAX                               (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUH2_1_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID2_ACCUH2_1_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID2_ACCUH2_1_RESERVED_MAX                                     (0x000000FFU)

 /* ACCUV_0 */

 #define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MASK                                 (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MAX                                  (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUV_0_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID2_ACCUV_0_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID2_ACCUV_0_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUV_1 */

 #define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MASK                                 (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MAX                                  (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUV_1_RESERVED_MASK                                     (0xFF000000U)
 #define CSL_DSS_VID2_ACCUV_1_RESERVED_SHIFT                                    (0x00000018U)
 #define CSL_DSS_VID2_ACCUV_1_RESERVED_MAX                                      (0x000000FFU)

 /* ACCUV2_0 */

 #define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MASK                                (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MAX                                 (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUV2_0_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID2_ACCUV2_0_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID2_ACCUV2_0_RESERVED_MAX                                     (0x000000FFU)

 /* ACCUV2_1 */

 #define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MASK                                (0x00FFFFFFU)
 #define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MAX                                 (0x00FFFFFFU)

 #define CSL_DSS_VID2_ACCUV2_1_RESERVED_MASK                                    (0xFF000000U)
 #define CSL_DSS_VID2_ACCUV2_1_RESERVED_SHIFT                                   (0x00000018U)
 #define CSL_DSS_VID2_ACCUV2_1_RESERVED_MAX                                     (0x000000FFU)

 /* ATTRIBUTES */

 #define CSL_DSS_VID2_ATTRIBUTES_ENABLE_MASK                                    (0x00000001U)
 #define CSL_DSS_VID2_ATTRIBUTES_ENABLE_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEOENB                            (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEODIS                            (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_MASK                                    (0x0000007EU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_SHIFT                                   (0x00000001U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_MAX                                     (0x0000003FU)

 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444                         (0x0U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444                         (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444                         (0x2U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB16_565                           (0x3U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR16_565                           (0x4U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555                         (0x5U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555                         (0x6U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888                         (0x7U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888                         (0x8U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888                         (0x9U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888                         (0xAU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB24P_888                          (0xBU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR24P_888                          (0xCU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010                      (0xEU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010                      (0xFU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616                     (0x10U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616                     (0x11U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP1                             (0x12U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP2                             (0x13U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP4                             (0x14U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP8                             (0x15U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB565A8                            (0x16U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR565A8                            (0x17U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444                         (0x20U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444                         (0x21U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444                         (0x22U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555                         (0x25U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555                         (0x26U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888                         (0x27U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888                         (0x28U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888                         (0x29U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888                         (0x2AU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010                      (0x2EU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010                      (0x2FU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616                     (0x30U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616                     (0x31U)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12                         (0x3CU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12                         (0x3DU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2                         (0x3EU)
 #define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY                         (0x3FU)

 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MASK                              (0x00000180U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_SHIFT                             (0x00000007U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MAX                               (0x00000003U)

 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC                    (0x0U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE                       (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE                       (0x2U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE                      (0x3U)

 #define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MASK                           (0x00000200U)
 #define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_SHIFT                          (0x00000009U)
 #define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MAX                            (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB                  (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS                  (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MASK                                (0x00000400U)
 #define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MAX                                 (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN                    (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS                   (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MASK                                 (0x00000800U)
 #define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MAX                                  (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE                        (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE                         (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_FLIP_MASK                                      (0x00001000U)
 #define CSL_DSS_VID2_ATTRIBUTES_FLIP_SHIFT                                     (0x0000000CU)
 #define CSL_DSS_VID2_ATTRIBUTES_FLIP_MAX                                       (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_FLIP                                  (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_NOFLIP                                (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_CROP_MASK                                      (0x00002000U)
 #define CSL_DSS_VID2_ATTRIBUTES_CROP_SHIFT                                     (0x0000000DU)
 #define CSL_DSS_VID2_ATTRIBUTES_CROP_MAX                                       (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPEN                                (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPDIS                               (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MASK                                 (0x0001C000U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MAX                                  (0x00000007U)

 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MASK                           (0x00020000U)
 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT                          (0x00000011U)
 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MAX                            (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN          (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS         (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MASK                                 (0x00040000U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_SHIFT                                (0x00000012U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MAX                                  (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MASK                                (0x00080000U)
 #define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_SHIFT                               (0x00000013U)
 #define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MAX                                 (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES                       (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL                          (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MASK                                 (0x00100000U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_SHIFT                                (0x00000014U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MAX                                  (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MASK                              (0x00200000U)
 #define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_SHIFT                             (0x00000015U)
 #define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MAX                               (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5                         (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3                         (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MASK                                 (0x00400000U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_SHIFT                                (0x00000016U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MAX                                  (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MASK                               (0x00800000U)
 #define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_SHIFT                              (0x00000017U)
 #define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MAX                                (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO                       (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO                     (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MASK                               (0x01000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_SHIFT                              (0x00000018U)
 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MAX                                (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB                 (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS                 (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MASK                                 (0x0E000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_SHIFT                                (0x00000019U)
 #define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MAX                                  (0x00000007U)

 #define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MASK                          (0x10000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT                         (0x0000001CU)
 #define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MAX                           (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA        (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA     (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK                         (0x20000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT                        (0x0000001DU)
 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX                          (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER                (0x0U)
 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER               (0x1U)

 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MASK                            (0x40000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_SHIFT                           (0x0000001EU)
 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MAX                             (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN                  (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS                 (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MASK                             (0x80000000U)
 #define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_SHIFT                            (0x0000001FU)
 #define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MAX                              (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN                    (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS                   (0x0U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MASK                                (0x00000001U)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB                          (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS                          (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MASK                              (0x0000000EU)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT                             (0x00000001U)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MAX                               (0x00000007U)

 #define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK                           (0x00000070U)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT                          (0x00000004U)
 #define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX                            (0x00000007U)

 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MASK                                 (0x00000180U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_SHIFT                                (0x00000007U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MAX                                  (0x00000003U)

 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_8B                               (0x0U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_10B                              (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_12B                              (0x2U)

 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MASK                                 (0x00000200U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_SHIFT                                (0x00000009U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MAX                                  (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_PACKED                           (0x0U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED                         (0x1U)

 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MASK                                (0x00000400U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MAX                                 (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB                             (0x1U)
 #define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB                             (0x0U)

 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MASK                                (0x0000F800U)
 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MASK                                (0x01F00000U)
 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MASK                                 (0x02000000U)
 #define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_SHIFT                                (0x00000019U)
 #define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MAX                                  (0x00000001U)

 #define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY                          (0x0U)
 #define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY                        (0x1U)

 #define CSL_DSS_VID2_ATTRIBUTES2_TAGS_MASK                                     (0x7C000000U)
 #define CSL_DSS_VID2_ATTRIBUTES2_TAGS_SHIFT                                    (0x0000001AU)
 #define CSL_DSS_VID2_ATTRIBUTES2_TAGS_MAX                                      (0x0000001FU)

 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MASK                                (0x80000000U)
 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_SHIFT                               (0x0000001FU)
 #define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MAX                                 (0x00000001U)

 /* BA_0 */

 #define CSL_DSS_VID2_BA_0_BA_MASK                                              (0xFFFFFFFFU)
 #define CSL_DSS_VID2_BA_0_BA_SHIFT                                             (0x00000000U)
 #define CSL_DSS_VID2_BA_0_BA_MAX                                               (0xFFFFFFFFU)

 /* BA_1 */

 #define CSL_DSS_VID2_BA_1_BA_MASK                                              (0xFFFFFFFFU)
 #define CSL_DSS_VID2_BA_1_BA_SHIFT                                             (0x00000000U)
 #define CSL_DSS_VID2_BA_1_BA_MAX                                               (0xFFFFFFFFU)

 /* BA_UV_0 */

 #define CSL_DSS_VID2_BA_UV_0_BA_MASK                                           (0xFFFFFFFFU)
 #define CSL_DSS_VID2_BA_UV_0_BA_SHIFT                                          (0x00000000U)
 #define CSL_DSS_VID2_BA_UV_0_BA_MAX                                            (0xFFFFFFFFU)

 /* BA_UV_1 */

 #define CSL_DSS_VID2_BA_UV_1_BA_MASK                                           (0xFFFFFFFFU)
 #define CSL_DSS_VID2_BA_UV_1_BA_SHIFT                                          (0x00000000U)
 #define CSL_DSS_VID2_BA_UV_1_BA_MAX                                            (0xFFFFFFFFU)

 /* BUF_SIZE_STATUS */

 #define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MASK                              (0x0000FFFFU)
 #define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MAX                               (0x0000FFFFU)

 #define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MASK                          (0xFFFF0000U)
 #define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_SHIFT                         (0x00000010U)
 #define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MAX                           (0x0000FFFFU)

 /* BUF_THRESHOLD */

 #define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK                        (0x0000FFFFU)
 #define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT                       (0x00000000U)
 #define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX                         (0x0000FFFFU)

 #define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK                       (0xFFFF0000U)
 #define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT                      (0x00000010U)
 #define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX                        (0x0000FFFFU)

 /* CSC_COEF0 */

 #define CSL_DSS_VID2_CSC_COEF0_C00_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID2_CSC_COEF0_C00_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF0_C00_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MASK                                (0x0000F800U)
 #define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID2_CSC_COEF0_C01_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID2_CSC_COEF0_C01_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF0_C01_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MASK                                (0xF8000000U)
 #define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MAX                                 (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VID2_CSC_COEF1_C02_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID2_CSC_COEF1_C02_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF1_C02_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MASK                                (0x0000F800U)
 #define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID2_CSC_COEF1_C10_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID2_CSC_COEF1_C10_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF1_C10_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MASK                                (0xF8000000U)
 #define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MAX                                 (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VID2_CSC_COEF2_C11_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID2_CSC_COEF2_C11_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF2_C11_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MASK                                (0x0000F800U)
 #define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID2_CSC_COEF2_C12_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID2_CSC_COEF2_C12_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF2_C12_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MASK                                (0xF8000000U)
 #define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MAX                                 (0x0000001FU)

 /* CSC_COEF3 */

 #define CSL_DSS_VID2_CSC_COEF3_C20_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID2_CSC_COEF3_C20_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF3_C20_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MASK                                (0x0000F800U)
 #define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MAX                                 (0x0000001FU)

 #define CSL_DSS_VID2_CSC_COEF3_C21_MASK                                        (0x07FF0000U)
 #define CSL_DSS_VID2_CSC_COEF3_C21_SHIFT                                       (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF3_C21_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MASK                                (0xF8000000U)
 #define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_SHIFT                               (0x0000001BU)
 #define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MAX                                 (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VID2_CSC_COEF4_C22_MASK                                        (0x000007FFU)
 #define CSL_DSS_VID2_CSC_COEF4_C22_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF4_C22_MAX                                         (0x000007FFU)

 #define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MASK                                (0xFFFFF800U)
 #define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_SHIFT                               (0x0000000BU)
 #define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MAX                                 (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VID2_CSC_COEF5_RESERVED_MASK                                   (0x00000007U)
 #define CSL_DSS_VID2_CSC_COEF5_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF5_RESERVED_MAX                                    (0x00000007U)

 #define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_SHIFT                                (0x00000003U)
 #define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VID2_CSC_COEF5_RESERVED1_MASK                                  (0x00070000U)
 #define CSL_DSS_VID2_CSC_COEF5_RESERVED1_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF5_RESERVED1_MAX                                   (0x00000007U)

 #define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_SHIFT                                (0x00000013U)
 #define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MAX                                  (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VID2_CSC_COEF6_RESERVED_MASK                                   (0x00000007U)
 #define CSL_DSS_VID2_CSC_COEF6_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF6_RESERVED_MAX                                    (0x00000007U)

 #define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_SHIFT                                (0x00000003U)
 #define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VID2_CSC_COEF6_RESERVED1_MASK                                  (0x00070000U)
 #define CSL_DSS_VID2_CSC_COEF6_RESERVED1_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF6_RESERVED1_MAX                                   (0x00000007U)

 #define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MASK                                (0xFFF80000U)
 #define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_SHIFT                               (0x00000013U)
 #define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MAX                                 (0x00001FFFU)

 /* FIRH */

 #define CSL_DSS_VID2_FIRH_FIRHINC_MASK                                         (0x00FFFFFFU)
 #define CSL_DSS_VID2_FIRH_FIRHINC_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VID2_FIRH_FIRHINC_MAX                                          (0x00FFFFFFU)

 #define CSL_DSS_VID2_FIRH_RESERVED_MASK                                        (0xFF000000U)
 #define CSL_DSS_VID2_FIRH_RESERVED_SHIFT                                       (0x00000018U)
 #define CSL_DSS_VID2_FIRH_RESERVED_MAX                                         (0x000000FFU)

 /* FIRH2 */

 #define CSL_DSS_VID2_FIRH2_FIRHINC_MASK                                        (0x00FFFFFFU)
 #define CSL_DSS_VID2_FIRH2_FIRHINC_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_FIRH2_FIRHINC_MAX                                         (0x00FFFFFFU)

 #define CSL_DSS_VID2_FIRH2_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_VID2_FIRH2_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_VID2_FIRH2_RESERVED_MAX                                        (0x000000FFU)

 /* FIRV */

 #define CSL_DSS_VID2_FIRV_FIRVINC_MASK                                         (0x00FFFFFFU)
 #define CSL_DSS_VID2_FIRV_FIRVINC_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VID2_FIRV_FIRVINC_MAX                                          (0x00FFFFFFU)

 #define CSL_DSS_VID2_FIRV_RESERVED_MASK                                        (0xFF000000U)
 #define CSL_DSS_VID2_FIRV_RESERVED_SHIFT                                       (0x00000018U)
 #define CSL_DSS_VID2_FIRV_RESERVED_MAX                                         (0x000000FFU)

 /* FIRV2 */

 #define CSL_DSS_VID2_FIRV2_FIRVINC_MASK                                        (0x00FFFFFFU)
 #define CSL_DSS_VID2_FIRV2_FIRVINC_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_FIRV2_FIRVINC_MAX                                         (0x00FFFFFFU)

 #define CSL_DSS_VID2_FIRV2_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_VID2_FIRV2_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_VID2_FIRV2_RESERVED_MAX                                        (0x000000FFU)

 /* FIR_COEF_H0 */

 #define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MASK                                   (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MAX                                    (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MASK                                (0x3FFFFC00U)
 #define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MAX                                 (0x000FFFFFU)

 #define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MASK                                 (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_SHIFT                                (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MAX                                  (0x00000003U)

 /* FIR_COEF_H0_C */

 #define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MASK                                 (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MAX                                  (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MASK                              (0x3FFFFC00U)
 #define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_SHIFT                             (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MAX                               (0x000FFFFFU)

 #define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MASK                               (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_SHIFT                              (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MAX                                (0x00000003U)

 /* FIR_COEF_H12 */

 #define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MASK                               (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MAX                                (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MASK                                  (0x000FFC00U)
 #define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MASK                                  (0x3FF00000U)
 #define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_SHIFT                                 (0x00000014U)
 #define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MASK                                (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_SHIFT                               (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MAX                                 (0x00000003U)

 /* FIR_COEF_H12_C */

 #define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MASK                             (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MAX                              (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MASK                                (0x000FFC00U)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MASK                                (0x3FF00000U)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MASK                              (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_SHIFT                             (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MAX                               (0x00000003U)

 /* FIR_COEF_V0 */

 #define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MASK                                   (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MAX                                    (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MASK                                (0x3FFFFC00U)
 #define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MAX                                 (0x000FFFFFU)

 #define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MASK                                 (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_SHIFT                                (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MAX                                  (0x00000003U)

 /* FIR_COEF_V0_C */

 #define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MASK                                 (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MAX                                  (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MASK                              (0x3FFFFC00U)
 #define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_SHIFT                             (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MAX                               (0x000FFFFFU)

 #define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MASK                               (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_SHIFT                              (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MAX                                (0x00000003U)

 /* FIR_COEF_V12 */

 #define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MASK                               (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MAX                                (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MASK                                  (0x000FFC00U)
 #define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MASK                                  (0x3FF00000U)
 #define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_SHIFT                                 (0x00000014U)
 #define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MAX                                   (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MASK                                (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_SHIFT                               (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MAX                                 (0x00000003U)

 /* FIR_COEF_V12_C */

 #define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MASK                             (0x000003FFU)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MAX                              (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MASK                                (0x000FFC00U)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MASK                                (0x3FF00000U)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_SHIFT                               (0x00000014U)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MAX                                 (0x000003FFU)

 #define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MASK                              (0xC0000000U)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_SHIFT                             (0x0000001EU)
 #define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MAX                               (0x00000003U)

 /* GLOBAL_ALPHA */

 #define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MASK                             (0x000000FFU)
 #define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MAX                              (0x000000FFU)

 #define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MASK                                (0xFFFFFF00U)
 #define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_SHIFT                               (0x00000008U)
 #define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MAX                                 (0x00FFFFFFU)

 /* MFLAG_THRESHOLD */

 #define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MASK                             (0x0000FFFFU)
 #define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MAX                              (0x0000FFFFU)

 #define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MASK                             (0xFFFF0000U)
 #define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT                            (0x00000010U)
 #define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MAX                              (0x0000FFFFU)

 /* PICTURE_SIZE */

 #define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MASK                                (0x00003FFFU)
 #define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MASK                                (0x3FFF0000U)
 #define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_SHIFT                               (0x00000010U)
 #define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MAX                                 (0x00003FFFU)

 /* PIXEL_INC */

 #define CSL_DSS_VID2_PIXEL_INC_PIXELINC_MASK                                   (0x000000FFU)
 #define CSL_DSS_VID2_PIXEL_INC_PIXELINC_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_PIXEL_INC_PIXELINC_MAX                                    (0x000000FFU)

 #define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MASK                                (0xFFFFFF00U)
 #define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_SHIFT                               (0x00000008U)
 #define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MAX                                 (0x00FFFFFFU)

 /* PRELOAD */

 #define CSL_DSS_VID2_PRELOAD_PRELOAD_MASK                                      (0x00000FFFU)
 #define CSL_DSS_VID2_PRELOAD_PRELOAD_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_PRELOAD_PRELOAD_MAX                                       (0x00000FFFU)

 #define CSL_DSS_VID2_PRELOAD_RESERVED_212_MASK                                 (0xFFFFF000U)
 #define CSL_DSS_VID2_PRELOAD_RESERVED_212_SHIFT                                (0x0000000CU)
 #define CSL_DSS_VID2_PRELOAD_RESERVED_212_MAX                                  (0x000FFFFFU)

 /* ROW_INC */

 #define CSL_DSS_VID2_ROW_INC_ROWINC_MASK                                       (0xFFFFFFFFU)
 #define CSL_DSS_VID2_ROW_INC_ROWINC_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_ROW_INC_ROWINC_MAX                                        (0xFFFFFFFFU)

 /* SIZE */

 #define CSL_DSS_VID2_SIZE_SIZEX_MASK                                           (0x00003FFFU)
 #define CSL_DSS_VID2_SIZE_SIZEX_SHIFT                                          (0x00000000U)
 #define CSL_DSS_VID2_SIZE_SIZEX_MAX                                            (0x00003FFFU)

 #define CSL_DSS_VID2_SIZE_SIZEY_MASK                                           (0x3FFF0000U)
 #define CSL_DSS_VID2_SIZE_SIZEY_SHIFT                                          (0x00000010U)
 #define CSL_DSS_VID2_SIZE_SIZEY_MAX                                            (0x00003FFFU)

 /* BA_EXT_0 */

 #define CSL_DSS_VID2_BA_EXT_0_BA_EXT_MASK                                      (0x0000FFFFU)
 #define CSL_DSS_VID2_BA_EXT_0_BA_EXT_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_BA_EXT_0_BA_EXT_MAX                                       (0x0000FFFFU)

 #define CSL_DSS_VID2_BA_EXT_0_RESERVED_MASK                                    (0xFFFF0000U)
 #define CSL_DSS_VID2_BA_EXT_0_RESERVED_SHIFT                                   (0x00000010U)
 #define CSL_DSS_VID2_BA_EXT_0_RESERVED_MAX                                     (0x0000FFFFU)

 /* BA_EXT_1 */

 #define CSL_DSS_VID2_BA_EXT_1_BA_EXT_MASK                                      (0x0000FFFFU)
 #define CSL_DSS_VID2_BA_EXT_1_BA_EXT_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_BA_EXT_1_BA_EXT_MAX                                       (0x0000FFFFU)

 #define CSL_DSS_VID2_BA_EXT_1_RESERVED_MASK                                    (0xFFFF0000U)
 #define CSL_DSS_VID2_BA_EXT_1_RESERVED_SHIFT                                   (0x00000010U)
 #define CSL_DSS_VID2_BA_EXT_1_RESERVED_MAX                                     (0x0000FFFFU)

 /* BA_UV_EXT_0 */

 #define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MASK                                (0x0000FFFFU)
 #define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MAX                                 (0x0000FFFFU)

 #define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MASK                                 (0xFFFF0000U)
 #define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_SHIFT                                (0x00000010U)
 #define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MAX                                  (0x0000FFFFU)

 /* BA_UV_EXT_1 */

 #define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MASK                                (0x0000FFFFU)
 #define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MAX                                 (0x0000FFFFU)

 #define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MASK                                 (0xFFFF0000U)
 #define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_SHIFT                                (0x00000010U)
 #define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MAX                                  (0x0000FFFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VID2_CSC_COEF7_RESERVED_MASK                                   (0x00000007U)
 #define CSL_DSS_VID2_CSC_COEF7_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_CSC_COEF7_RESERVED_MAX                                    (0x00000007U)

 #define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MASK                                (0x0000FFF8U)
 #define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_SHIFT                               (0x00000003U)
 #define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MAX                                 (0x00001FFFU)

 #define CSL_DSS_VID2_CSC_COEF7_RESERVED1_MASK                                  (0x00070000U)
 #define CSL_DSS_VID2_CSC_COEF7_RESERVED1_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VID2_CSC_COEF7_RESERVED1_MAX                                   (0x00000007U)

 #define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MASK                                (0xFFF80000U)
 #define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_SHIFT                               (0x00000013U)
 #define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MAX                                 (0x00001FFFU)

 /* ROW_INC_UV */

 #define CSL_DSS_VID2_ROW_INC_UV_ROWINC_MASK                                    (0xFFFFFFFFU)
 #define CSL_DSS_VID2_ROW_INC_UV_ROWINC_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VID2_ROW_INC_UV_ROWINC_MAX                                     (0xFFFFFFFFU)

 /* TILE */

 #define CSL_DSS_VID2_TILE_TILEINDEX_MASK                                       (0x007FFFFFU)
 #define CSL_DSS_VID2_TILE_TILEINDEX_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_TILE_TILEINDEX_MAX                                        (0x007FFFFFU)

 /* TILE2 */

 #define CSL_DSS_VID2_TILE2_NUM_TILES_MASK                                      (0x007FFFFFU)
 #define CSL_DSS_VID2_TILE2_NUM_TILES_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_TILE2_NUM_TILES_MAX                                       (0x007FFFFFU)

 #define CSL_DSS_VID2_TILE2_RESERVED_MASK                                       (0xFF800000U)
 #define CSL_DSS_VID2_TILE2_RESERVED_SHIFT                                      (0x00000017U)
 #define CSL_DSS_VID2_TILE2_RESERVED_MAX                                        (0x000001FFU)

 /* FBDC_ATTRIBUTES */

 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MASK                               (0x00000001U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_SHIFT                              (0x00000000U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MASK                               (0x000000FEU)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_SHIFT                              (0x00000001U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MAX                                (0x0000007FU)

 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8                       (0xCU)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10                    (0xEU)

 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MASK                             (0x00000300U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_SHIFT                            (0x00000008U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MAX                              (0x00000003U)

 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4                    (0x2U)
 #define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2                    (0x3U)

 /* FBDC_CLEAR_COLOR */

 #define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK                          (0xFFFFFFFFU)
 #define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT                         (0x00000000U)
 #define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX                           (0xFFFFFFFFU)

 /* CLUT_0 */

 #define CSL_DSS_VID2_CLUT_0_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_0_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_0_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_0_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_0_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_0_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_0_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_0_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_0_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_0_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_0_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_0_INDEX_MAX                                          (0x00000001U)

 /* CLUT_1 */

 #define CSL_DSS_VID2_CLUT_1_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_1_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_1_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_1_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_1_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_1_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_1_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_1_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_1_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_1_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_1_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_1_INDEX_MAX                                          (0x00000001U)

 /* CLUT_2 */

 #define CSL_DSS_VID2_CLUT_2_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_2_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_2_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_2_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_2_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_2_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_2_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_2_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_2_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_2_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_2_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_2_INDEX_MAX                                          (0x00000001U)

 /* CLUT_3 */

 #define CSL_DSS_VID2_CLUT_3_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_3_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_3_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_3_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_3_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_3_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_3_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_3_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_3_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_3_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_3_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_3_INDEX_MAX                                          (0x00000001U)

 /* CLUT_4 */

 #define CSL_DSS_VID2_CLUT_4_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_4_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_4_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_4_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_4_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_4_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_4_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_4_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_4_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_4_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_4_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_4_INDEX_MAX                                          (0x00000001U)

 /* CLUT_5 */

 #define CSL_DSS_VID2_CLUT_5_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_5_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_5_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_5_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_5_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_5_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_5_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_5_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_5_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_5_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_5_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_5_INDEX_MAX                                          (0x00000001U)

 /* CLUT_6 */

 #define CSL_DSS_VID2_CLUT_6_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_6_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_6_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_6_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_6_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_6_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_6_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_6_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_6_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_6_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_6_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_6_INDEX_MAX                                          (0x00000001U)

 /* CLUT_7 */

 #define CSL_DSS_VID2_CLUT_7_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_7_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_7_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_7_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_7_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_7_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_7_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_7_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_7_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_7_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_7_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_7_INDEX_MAX                                          (0x00000001U)

 /* CLUT_8 */

 #define CSL_DSS_VID2_CLUT_8_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_8_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_8_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_8_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_8_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_8_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_8_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_8_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_8_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_8_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_8_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_8_INDEX_MAX                                          (0x00000001U)

 /* CLUT_9 */

 #define CSL_DSS_VID2_CLUT_9_VALUE_B_MASK                                       (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_9_VALUE_B_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VID2_CLUT_9_VALUE_B_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_9_VALUE_G_MASK                                       (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_9_VALUE_G_SHIFT                                      (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_9_VALUE_G_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_9_VALUE_R_MASK                                       (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_9_VALUE_R_SHIFT                                      (0x00000014U)
 #define CSL_DSS_VID2_CLUT_9_VALUE_R_MAX                                        (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_9_INDEX_MASK                                         (0x80000000U)
 #define CSL_DSS_VID2_CLUT_9_INDEX_SHIFT                                        (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_9_INDEX_MAX                                          (0x00000001U)

 /* CLUT_10 */

 #define CSL_DSS_VID2_CLUT_10_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_10_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_CLUT_10_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_10_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_10_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_10_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_10_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_10_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID2_CLUT_10_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_10_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID2_CLUT_10_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_10_INDEX_MAX                                         (0x00000001U)

 /* CLUT_11 */

 #define CSL_DSS_VID2_CLUT_11_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_11_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_CLUT_11_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_11_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_11_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_11_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_11_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_11_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID2_CLUT_11_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_11_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID2_CLUT_11_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_11_INDEX_MAX                                         (0x00000001U)

 /* CLUT_12 */

 #define CSL_DSS_VID2_CLUT_12_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_12_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_CLUT_12_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_12_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_12_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_12_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_12_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_12_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID2_CLUT_12_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_12_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID2_CLUT_12_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_12_INDEX_MAX                                         (0x00000001U)

 /* CLUT_13 */

 #define CSL_DSS_VID2_CLUT_13_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_13_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_CLUT_13_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_13_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_13_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_13_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_13_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_13_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID2_CLUT_13_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_13_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID2_CLUT_13_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_13_INDEX_MAX                                         (0x00000001U)

 /* CLUT_14 */

 #define CSL_DSS_VID2_CLUT_14_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_14_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_CLUT_14_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_14_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_14_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_14_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_14_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_14_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID2_CLUT_14_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_14_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID2_CLUT_14_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_14_INDEX_MAX                                         (0x00000001U)

 /* CLUT_15 */

 #define CSL_DSS_VID2_CLUT_15_VALUE_B_MASK                                      (0x000003FFU)
 #define CSL_DSS_VID2_CLUT_15_VALUE_B_SHIFT                                     (0x00000000U)
 #define CSL_DSS_VID2_CLUT_15_VALUE_B_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_15_VALUE_G_MASK                                      (0x000FFC00U)
 #define CSL_DSS_VID2_CLUT_15_VALUE_G_SHIFT                                     (0x0000000AU)
 #define CSL_DSS_VID2_CLUT_15_VALUE_G_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_15_VALUE_R_MASK                                      (0x3FF00000U)
 #define CSL_DSS_VID2_CLUT_15_VALUE_R_SHIFT                                     (0x00000014U)
 #define CSL_DSS_VID2_CLUT_15_VALUE_R_MAX                                       (0x000003FFU)

 #define CSL_DSS_VID2_CLUT_15_INDEX_MASK                                        (0x80000000U)
 #define CSL_DSS_VID2_CLUT_15_INDEX_SHIFT                                       (0x0000001FU)
 #define CSL_DSS_VID2_CLUT_15_INDEX_MAX                                         (0x00000001U)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MASK                             (0x00000001U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_SHIFT                            (0x00000000U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MAX                              (0x00000001U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                        (0x00000002U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                       (0x00000001U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                         (0x00000001U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK               (0x1U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE             (0x0U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                         (0x00000004U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                        (0x00000002U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                          (0x00000001U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                   (0x1U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                  (0x0U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MASK                          (0x000007F8U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                         (0x00000003U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MAX                           (0x000000FFU)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                          (0x00001800U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                         (0x0000000BU)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                           (0x00000003U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE                   (0x0U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                      (0x1U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                       (0x2U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                  (0x3U)

 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MASK                           (0xFFFFE000U)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_SHIFT                          (0x0000000DU)
 #define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MAX                            (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                      (0xFFFFFFFFU)
 #define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                     (0x00000000U)
 #define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                       (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VID2_SAFETY_POSITION_POSX_MASK                                 (0x00003FFFU)
 #define CSL_DSS_VID2_SAFETY_POSITION_POSX_SHIFT                                (0x00000000U)
 #define CSL_DSS_VID2_SAFETY_POSITION_POSX_MAX                                  (0x00003FFFU)

 #define CSL_DSS_VID2_SAFETY_POSITION_POSY_MASK                                 (0x3FFF0000U)
 #define CSL_DSS_VID2_SAFETY_POSITION_POSY_SHIFT                                (0x00000010U)
 #define CSL_DSS_VID2_SAFETY_POSITION_POSY_MAX                                  (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                       (0xFFFFFFFFU)
 #define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                      (0x00000000U)
 #define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                        (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MASK                                    (0x00003FFFU)
 #define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MAX                                     (0x00003FFFU)

 #define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MASK                                    (0x3FFF0000U)
 #define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_SHIFT                                   (0x00000010U)
 #define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MAX                                     (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MASK                                (0xFFFFFFFFU)
 #define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_SHIFT                               (0x00000000U)
 #define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MAX                                 (0xFFFFFFFFU)

 /* LUMAKEY */

 #define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MASK                                   (0x00000FFFU)
 #define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_SHIFT                                  (0x00000000U)
 #define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MAX                                    (0x00000FFFU)

 #define CSL_DSS_VID2_LUMAKEY_RESERVED_MASK                                     (0x0000F000U)
 #define CSL_DSS_VID2_LUMAKEY_RESERVED_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_VID2_LUMAKEY_RESERVED_MAX                                      (0x0000000FU)

 #define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MASK                                   (0x0FFF0000U)
 #define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MAX                                    (0x00000FFFU)

 #define CSL_DSS_VID2_LUMAKEY_RESERVED1_MASK                                    (0xF0000000U)
 #define CSL_DSS_VID2_LUMAKEY_RESERVED1_SHIFT                                   (0x0000001CU)
 #define CSL_DSS_VID2_LUMAKEY_RESERVED1_MAX                                     (0x0000000FU)

 /* DMA_BUFSIZE */

 #define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MASK                                  (0x0000001FU)
 #define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MAX                                   (0x0000001FU)

 #define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MASK                                 (0xFFFFFFE0U)
 #define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_SHIFT                                (0x00000005U)
 #define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MAX                                  (0x07FFFFFFU)

 /* CROP */

 #define CSL_DSS_VID2_CROP_CROPLEFT_MASK                                        (0x0000001FU)
 #define CSL_DSS_VID2_CROP_CROPLEFT_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_CROP_CROPLEFT_MAX                                         (0x0000001FU)

 #define CSL_DSS_VID2_CROP_CROPRIGHT_MASK                                       (0x00001F00U)
 #define CSL_DSS_VID2_CROP_CROPRIGHT_SHIFT                                      (0x00000008U)
 #define CSL_DSS_VID2_CROP_CROPRIGHT_MAX                                        (0x0000001FU)

 #define CSL_DSS_VID2_CROP_CROPTOP_MASK                                         (0x001F0000U)
 #define CSL_DSS_VID2_CROP_CROPTOP_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VID2_CROP_CROPTOP_MAX                                          (0x0000001FU)

 #define CSL_DSS_VID2_CROP_CROPBOTTOM_MASK                                      (0x1F000000U)
 #define CSL_DSS_VID2_CROP_CROPBOTTOM_SHIFT                                     (0x00000018U)
 #define CSL_DSS_VID2_CROP_CROPBOTTOM_MAX                                       (0x0000001FU)

 /* SECURE */

 #define CSL_DSS_VID2_SECURE_SECURE_MASK                                        (0x00000001U)
 #define CSL_DSS_VID2_SECURE_SECURE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_SECURE_SECURE_MAX                                         (0x00000001U)

 #define CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREDIS                               (0x0U)
 #define CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREEN                                (0x1U)

 #define CSL_DSS_VID2_SECURE_RESERVED_MASK                                      (0xFFFFFFFEU)
 #define CSL_DSS_VID2_SECURE_RESERVED_SHIFT                                     (0x00000001U)
 #define CSL_DSS_VID2_SECURE_RESERVED_MAX                                       (0x7FFFFFFFU)

 /* PIPE_GO */

 #define CSL_DSS_VID2_PIPE_GO_GOBIT_MASK                                        (0x00000001U)
 #define CSL_DSS_VID2_PIPE_GO_GOBIT_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VID2_PIPE_GO_GOBIT_MAX                                         (0x00000001U)

 #define CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_HFUISR                                  (0x0U)
 #define CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_UFPSR                                   (0x1U)

 #define CSL_DSS_VID2_PIPE_GO_RESERVED_MASK                                     (0xFFFFFFFEU)
 #define CSL_DSS_VID2_PIPE_GO_RESERVED_SHIFT                                    (0x00000001U)
 #define CSL_DSS_VID2_PIPE_GO_RESERVED_MAX                                      (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : OVR1 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t VIRTUALVP;                 /* VIRTUALVP */
     volatile uint32_t DEFAULT_COLOR;             /* DEFAULT_COLOR */
     volatile uint32_t DEFAULT_COLOR2;            /* DEFAULT_COLOR2 */
     volatile uint32_t TRANS_COLOR_MAX;           /* TRANS_COLOR_MAX */
     volatile uint32_t TRANS_COLOR_MAX2;          /* TRANS_COLOR_MAX2 */
     volatile uint32_t TRANS_COLOR_MIN;           /* TRANS_COLOR_MIN */
     volatile uint32_t TRANS_COLOR_MIN2;          /* TRANS_COLOR_MIN2 */
     volatile uint32_t ATTRIBUTES[5U];            /* ATTRIBUTES 0..4 */
     volatile uint32_t ATTRIBUTES2[5U];           /* ATTRIBUTES2 0..4 */
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_ovr1Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_OVR1_CONFIG                                                    (0x00000000U)
 #define CSL_DSS_OVR1_VIRTUALVP                                                 (0x00000004U)
 #define CSL_DSS_OVR1_DEFAULT_COLOR                                             (0x00000008U)
 #define CSL_DSS_OVR1_DEFAULT_COLOR2                                            (0x0000000CU)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX                                           (0x00000010U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2                                          (0x00000014U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN                                           (0x00000018U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2                                          (0x0000001CU)
 #define CSL_DSS_OVR1_ATTRIBUTES(index)                                         (0x00000020U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR1_ATTRIBUTES2(index)                                        (0x00000034U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR1_SECURE                                                    (0x00000048U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_OVR1_CONFIG_RESERVED6_MASK                                     (0x00000001U)
 #define CSL_DSS_OVR1_CONFIG_RESERVED6_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR1_CONFIG_RESERVED6_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_MASK                                    (0x00000002U)
 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_SHIFT                                   (0x00000001U)
 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBARDIS                         (0x0U)
 #define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBAREN                          (0x1U)

 #define CSL_DSS_OVR1_CONFIG_RESERVED_MASK                                      (0x000003FCU)
 #define CSL_DSS_OVR1_CONFIG_RESERVED_SHIFT                                     (0x00000002U)
 #define CSL_DSS_OVR1_CONFIG_RESERVED_MAX                                       (0x000000FFU)

 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MASK                                  (0x00000400U)
 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MAX                                   (0x00000001U)

 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_DISTCK                            (0x0U)
 #define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_ENBTCK                            (0x1U)

 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MASK                               (0x00000800U)
 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_SHIFT                              (0x0000000BU)
 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MAX                                (0x00000001U)

 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_GDTK                           (0x0U)
 #define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_VSTK                           (0x1U)

 #define CSL_DSS_OVR1_CONFIG_RESERVED2_MASK                                     (0x00001000U)
 #define CSL_DSS_OVR1_CONFIG_RESERVED2_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_OVR1_CONFIG_RESERVED2_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR1_CONFIG_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_OVR1_CONFIG_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_OVR1_CONFIG_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR1_CONFIG_RESERVED1_MASK                                     (0xFFFFC000U)
 #define CSL_DSS_OVR1_CONFIG_RESERVED1_SHIFT                                    (0x0000000EU)
 #define CSL_DSS_OVR1_CONFIG_RESERVED1_MAX                                      (0x0003FFFFU)

 /* VIRTUALVP */

 #define CSL_DSS_OVR1_VIRTUALVP_PPL_MASK                                        (0x00003FFFU)
 #define CSL_DSS_OVR1_VIRTUALVP_PPL_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR1_VIRTUALVP_PPL_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR1_VIRTUALVP_LPP_MASK                                        (0x3FFF0000U)
 #define CSL_DSS_OVR1_VIRTUALVP_LPP_SHIFT                                       (0x00000010U)
 #define CSL_DSS_OVR1_VIRTUALVP_LPP_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR1_VIRTUALVP_ENABLE_MASK                                     (0x80000000U)
 #define CSL_DSS_OVR1_VIRTUALVP_ENABLE_SHIFT                                    (0x0000001FU)
 #define CSL_DSS_OVR1_VIRTUALVP_ENABLE_MAX                                      (0x00000001U)

 /* DEFAULT_COLOR */

 #define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MASK                           (0xFFFFFFFFU)
 #define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT                          (0x00000000U)
 #define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MAX                            (0xFFFFFFFFU)

 /* DEFAULT_COLOR2 */

 #define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MASK                          (0x0000FFFFU)
 #define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT                         (0x00000000U)
 #define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MAX                           (0x0000FFFFU)

 #define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MASK                              (0xFFFF0000U)
 #define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_SHIFT                             (0x00000010U)
 #define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MAX                               (0x0000FFFFU)

 /* TRANS_COLOR_MAX */

 #define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MAX2 */

 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* TRANS_COLOR_MIN */

 #define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MIN2 */

 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* ATTRIBUTES */

 #define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MASK                                    (0x00000001U)
 #define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_SHIFT                                   (0x00000000U)
 #define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MASK                                 (0x0000001EU)
 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_SHIFT                                (0x00000001U)
 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MAX                                  (0x0000000FU)

 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID1                             (0x0U)
 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL1                            (0x1U)
 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID2                             (0x2U)
 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL2                            (0x3U)
 #define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIRTCH                           (0x4U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_OVR1_ATTRIBUTES2_POSX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_OVR1_ATTRIBUTES2_POSX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR1_ATTRIBUTES2_POSX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_OVR1_ATTRIBUTES2_POSY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_OVR1_ATTRIBUTES2_POSY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_OVR1_ATTRIBUTES2_POSY_MAX                                      (0x00003FFFU)

 /* SECURE */

 #define CSL_DSS_OVR1_SECURE_SECURE_MASK                                        (0x00000001U)
 #define CSL_DSS_OVR1_SECURE_SECURE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR1_SECURE_SECURE_MAX                                         (0x00000001U)

 #define CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREDIS                               (0x0U)
 #define CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREEN                                (0x1U)

 #define CSL_DSS_OVR1_SECURE_RESERVED_MASK                                      (0xFFFFFFFEU)
 #define CSL_DSS_OVR1_SECURE_RESERVED_SHIFT                                     (0x00000001U)
 #define CSL_DSS_OVR1_SECURE_RESERVED_MAX                                       (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VP1 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t CONTROL;                   /* CONTROL */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t DATA_CYCLE_0;              /* DATA_CYCLE_0 */
     volatile uint32_t DATA_CYCLE_1;              /* DATA_CYCLE_1 */
     volatile uint32_t DATA_CYCLE_2;              /* DATA_CYCLE_2 */
     volatile uint8_t  Resv_68[36];
     volatile uint32_t LINE_NUMBER;               /* LINE_NUMBER */
     volatile uint8_t  Resv_76[4];
     volatile uint32_t POL_FREQ;                  /* POL_FREQ */
     volatile uint32_t SIZE_SCREEN;               /* SIZE_SCREEN */
     volatile uint32_t TIMING_H;                  /* TIMING_H */
     volatile uint32_t TIMING_V;                  /* TIMING_V */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint32_t SAFETY_ATTRIBUTES[8U];     /* SAFETY_ATTRIBUTES 0..7 */
     volatile uint32_t SAFETY_CAPT_SIGNATURE[8U]; /* SAFETY_CAPT_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_POSITION[8U];       /* SAFETY_POSITION 0..7 */
     volatile uint32_t SAFETY_REF_SIGNATURE[8U];  /* SAFETY_REF_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_SIZE[8U];           /* SAFETY_SIZE 0..7 */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint8_t  Resv_288[12];
     volatile uint32_t GAMMA_TABLE_0;             /* GAMMA_TABLE_0 */
     volatile uint32_t GAMMA_TABLE_1;             /* GAMMA_TABLE_1 */
     volatile uint32_t GAMMA_TABLE_2;             /* GAMMA_TABLE_2 */
     volatile uint32_t GAMMA_TABLE_3;             /* GAMMA_TABLE_3 */
     volatile uint32_t GAMMA_TABLE_4;             /* GAMMA_TABLE_4 */
     volatile uint32_t GAMMA_TABLE_5;             /* GAMMA_TABLE_5 */
     volatile uint32_t GAMMA_TABLE_6;             /* GAMMA_TABLE_6 */
     volatile uint32_t GAMMA_TABLE_7;             /* GAMMA_TABLE_7 */
     volatile uint32_t GAMMA_TABLE_8;             /* GAMMA_TABLE_8 */
     volatile uint32_t GAMMA_TABLE_9;             /* GAMMA_TABLE_9 */
     volatile uint32_t GAMMA_TABLE_10;            /* GAMMA_TABLE_10 */
     volatile uint32_t GAMMA_TABLE_11;            /* GAMMA_TABLE_11 */
     volatile uint32_t GAMMA_TABLE_12;            /* GAMMA_TABLE_12 */
     volatile uint32_t GAMMA_TABLE_13;            /* GAMMA_TABLE_13 */
     volatile uint32_t GAMMA_TABLE_14;            /* GAMMA_TABLE_14 */
     volatile uint32_t GAMMA_TABLE_15;            /* GAMMA_TABLE_15 */
     volatile uint32_t DSS_OLDI_CFG;              /* DSS_OLDI_CFG */
     volatile uint32_t DSS_OLDI_STATUS;           /* DSS_OLDI_STATUS */
     volatile uint32_t DSS_OLDI_LB;               /* DSS_OLDI_LB */
     volatile uint8_t  Resv_376[12];
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_vp1Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VP1_CONFIG                                                     (0x00000000U)
 #define CSL_DSS_VP1_CONTROL                                                    (0x00000004U)
 #define CSL_DSS_VP1_CSC_COEF0                                                  (0x00000008U)
 #define CSL_DSS_VP1_CSC_COEF1                                                  (0x0000000CU)
 #define CSL_DSS_VP1_CSC_COEF2                                                  (0x00000010U)
 #define CSL_DSS_VP1_DATA_CYCLE_0                                               (0x00000014U)
 #define CSL_DSS_VP1_DATA_CYCLE_1                                               (0x00000018U)
 #define CSL_DSS_VP1_DATA_CYCLE_2                                               (0x0000001CU)
 #define CSL_DSS_VP1_LINE_NUMBER                                                (0x00000044U)
 #define CSL_DSS_VP1_POL_FREQ                                                   (0x0000004CU)
 #define CSL_DSS_VP1_SIZE_SCREEN                                                (0x00000050U)
 #define CSL_DSS_VP1_TIMING_H                                                   (0x00000054U)
 #define CSL_DSS_VP1_TIMING_V                                                   (0x00000058U)
 #define CSL_DSS_VP1_CSC_COEF3                                                  (0x0000005CU)
 #define CSL_DSS_VP1_CSC_COEF4                                                  (0x00000060U)
 #define CSL_DSS_VP1_CSC_COEF5                                                  (0x00000064U)
 #define CSL_DSS_VP1_CSC_COEF6                                                  (0x00000068U)
 #define CSL_DSS_VP1_CSC_COEF7                                                  (0x0000006CU)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES(index)                                   (0x00000070U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE(index)                               (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP1_SAFETY_POSITION(index)                                     (0x000000B0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE(index)                                (0x000000D0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP1_SAFETY_SIZE(index)                                         (0x000000F0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP1_SAFETY_LFSR_SEED                                           (0x00000110U)
 #define CSL_DSS_VP1_GAMMA_TABLE_0                                              (0x00000120U)
 #define CSL_DSS_VP1_GAMMA_TABLE_1                                              (0x00000124U)
 #define CSL_DSS_VP1_GAMMA_TABLE_2                                              (0x00000128U)
 #define CSL_DSS_VP1_GAMMA_TABLE_3                                              (0x0000012CU)
 #define CSL_DSS_VP1_GAMMA_TABLE_4                                              (0x00000130U)
 #define CSL_DSS_VP1_GAMMA_TABLE_5                                              (0x00000134U)
 #define CSL_DSS_VP1_GAMMA_TABLE_6                                              (0x00000138U)
 #define CSL_DSS_VP1_GAMMA_TABLE_7                                              (0x0000013CU)
 #define CSL_DSS_VP1_GAMMA_TABLE_8                                              (0x00000140U)
 #define CSL_DSS_VP1_GAMMA_TABLE_9                                              (0x00000144U)
 #define CSL_DSS_VP1_GAMMA_TABLE_10                                             (0x00000148U)
 #define CSL_DSS_VP1_GAMMA_TABLE_11                                             (0x0000014CU)
 #define CSL_DSS_VP1_GAMMA_TABLE_12                                             (0x00000150U)
 #define CSL_DSS_VP1_GAMMA_TABLE_13                                             (0x00000154U)
 #define CSL_DSS_VP1_GAMMA_TABLE_14                                             (0x00000158U)
 #define CSL_DSS_VP1_GAMMA_TABLE_15                                             (0x0000015CU)
 #define CSL_DSS_VP1_DSS_OLDI_CFG                                               (0x00000160U)
 #define CSL_DSS_VP1_DSS_OLDI_STATUS                                            (0x00000164U)
 #define CSL_DSS_VP1_DSS_OLDI_LB                                                (0x00000168U)
 #define CSL_DSS_VP1_SECURE                                                     (0x00000178U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_VP1_CONFIG_PIXELGATED_MASK                                     (0x00000001U)
 #define CSL_DSS_VP1_CONFIG_PIXELGATED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP1_CONFIG_PIXELGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGA                             (0x0U)
 #define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGV                             (0x1U)

 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MASK                                (0x00000002U)
 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_SHIFT                               (0x00000001U)
 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGDIS                          (0x0U)
 #define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGENB                          (0x1U)

 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MASK                                    (0x00000004U)
 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_SHIFT                                   (0x00000002U)
 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMADIS                            (0x0U)
 #define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMAENB                            (0x1U)

 #define CSL_DSS_VP1_CONFIG_HDMIMODE_MASK                                       (0x00000008U)
 #define CSL_DSS_VP1_CONFIG_HDMIMODE_SHIFT                                      (0x00000003U)
 #define CSL_DSS_VP1_CONFIG_HDMIMODE_MAX                                        (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MASK                                 (0x00000010U)
 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_SHIFT                                (0x00000004U)
 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MAX                                  (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGDIS                           (0x0U)
 #define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGENB                           (0x1U)

 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MASK                                (0x00000020U)
 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_SHIFT                               (0x00000005U)
 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS                          (0x0U)
 #define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGENB                          (0x1U)

 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_MASK                                     (0x00000040U)
 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGDIS                                (0x0U)
 #define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGENB                                (0x1U)

 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_MASK                                     (0x00000080U)
 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_SHIFT                                    (0x00000007U)
 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGDIS                                (0x0U)
 #define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGENB                                (0x1U)

 #define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MASK                                 (0x00000100U)
 #define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_SHIFT                                (0x00000008U)
 #define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MAX                                  (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_RESERVED1_MASK                                      (0x00007E00U)
 #define CSL_DSS_VP1_CONFIG_RESERVED1_SHIFT                                     (0x00000009U)
 #define CSL_DSS_VP1_CONFIG_RESERVED1_MAX                                       (0x0000003FU)

 #define CSL_DSS_VP1_CONFIG_CPR_MASK                                            (0x00008000U)
 #define CSL_DSS_VP1_CONFIG_CPR_SHIFT                                           (0x0000000FU)
 #define CSL_DSS_VP1_CONFIG_CPR_MAX                                             (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MASK                                (0x00010000U)
 #define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_SHIFT                               (0x00000010U)
 #define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_RESERVED2_MASK                                      (0x000E0000U)
 #define CSL_DSS_VP1_CONFIG_RESERVED2_SHIFT                                     (0x00000011U)
 #define CSL_DSS_VP1_CONFIG_RESERVED2_MAX                                       (0x00000007U)

 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_MASK                                    (0x00100000U)
 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_SHIFT                                   (0x00000014U)
 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_DISABLE                             (0x0U)
 #define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_ENABLE                              (0x1U)

 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MASK                                   (0x00200000U)
 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_SHIFT                                  (0x00000015U)
 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MAX                                    (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_DISABLE                            (0x0U)
 #define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_ENABLE                             (0x1U)

 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MASK                               (0x00400000U)
 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_SHIFT                              (0x00000016U)
 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE                        (0x0U)
 #define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE                         (0x1U)

 #define CSL_DSS_VP1_CONFIG_FIDFIRST_MASK                                       (0x00800000U)
 #define CSL_DSS_VP1_CONFIG_FIDFIRST_SHIFT                                      (0x00000017U)
 #define CSL_DSS_VP1_CONFIG_FIDFIRST_MAX                                        (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN                                   (0x0U)
 #define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD                                    (0x1U)

 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MASK                                (0x01000000U)
 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_SHIFT                               (0x00000018U)
 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS                       (0x0U)
 #define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCENB                       (0x1U)

 #define CSL_DSS_VP1_CONFIG_FULLRANGE_MASK                                      (0x02000000U)
 #define CSL_DSS_VP1_CONFIG_FULLRANGE_SHIFT                                     (0x00000019U)
 #define CSL_DSS_VP1_CONFIG_FULLRANGE_MAX                                       (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_LIMRANGE                              (0x0U)
 #define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_FULLRANGE                             (0x1U)

 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MASK                                   (0x04000000U)
 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_SHIFT                                  (0x0000001AU)
 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MAX                                    (0x00000001U)

 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA                         (0x0U)
 #define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA                        (0x1U)

 #define CSL_DSS_VP1_CONFIG_RESERVED3_MASK                                      (0xF8000000U)
 #define CSL_DSS_VP1_CONFIG_RESERVED3_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP1_CONFIG_RESERVED3_MAX                                       (0x0000001FU)

 /* CONTROL */

 #define CSL_DSS_VP1_CONTROL_ENABLE_MASK                                        (0x00000001U)
 #define CSL_DSS_VP1_CONTROL_ENABLE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VP1_CONTROL_ENABLE_MAX                                         (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPDIS                                (0x0U)
 #define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPENB                                (0x1U)

 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MASK                        (0x00000002U)
 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_SHIFT                       (0x00000001U)
 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MAX                         (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS                  (0x0U)
 #define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN                   (0x1U)

 #define CSL_DSS_VP1_CONTROL_MONOCOLOR_MASK                                     (0x00000004U)
 #define CSL_DSS_VP1_CONTROL_MONOCOLOR_SHIFT                                    (0x00000002U)
 #define CSL_DSS_VP1_CONTROL_MONOCOLOR_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_STN_MASK                                           (0x00000008U)
 #define CSL_DSS_VP1_CONTROL_STN_SHIFT                                          (0x00000003U)
 #define CSL_DSS_VP1_CONTROL_STN_MAX                                            (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_M8B_MASK                                           (0x00000010U)
 #define CSL_DSS_VP1_CONTROL_M8B_SHIFT                                          (0x00000004U)
 #define CSL_DSS_VP1_CONTROL_M8B_MAX                                            (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_GOBIT_MASK                                         (0x00000020U)
 #define CSL_DSS_VP1_CONTROL_GOBIT_SHIFT                                        (0x00000005U)
 #define CSL_DSS_VP1_CONTROL_GOBIT_MAX                                          (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_GOBIT_VAL_HFUISR                                   (0x0U)
 #define CSL_DSS_VP1_CONTROL_GOBIT_VAL_UFPSR                                    (0x1U)

 #define CSL_DSS_VP1_CONTROL_DPIENABLE_MASK                                     (0x00000040U)
 #define CSL_DSS_VP1_CONTROL_DPIENABLE_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP1_CONTROL_DPIENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPDIS                             (0x0U)
 #define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPENB                             (0x1U)

 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MASK                                (0x00000080U)
 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_SHIFT                               (0x00000007U)
 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHDIS                       (0x0U)
 #define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHENB                       (0x1U)

 #define CSL_DSS_VP1_CONTROL_DATALINES_MASK                                     (0x00000700U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_SHIFT                                    (0x00000008U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_MAX                                      (0x00000007U)

 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB12B                             (0x0U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB16B                             (0x1U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB18B                             (0x2U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB24B                             (0x3U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB30B                             (0x4U)
 #define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB36B                             (0x5U)

 #define CSL_DSS_VP1_CONTROL_STALLMODE_MASK                                     (0x00000800U)
 #define CSL_DSS_VP1_CONTROL_STALLMODE_SHIFT                                    (0x0000000BU)
 #define CSL_DSS_VP1_CONTROL_STALLMODE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLDIS                             (0x0U)
 #define CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLENB                             (0x1U)

 #define CSL_DSS_VP1_CONTROL_STALLMODETYPE_MASK                                 (0x00001000U)
 #define CSL_DSS_VP1_CONTROL_STALLMODETYPE_SHIFT                                (0x0000000CU)
 #define CSL_DSS_VP1_CONTROL_STALLMODETYPE_MAX                                  (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_COMMANDMODE                      (0x0U)
 #define CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_VIDEOMODE                        (0x1U)

 #define CSL_DSS_VP1_CONTROL_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_VP1_CONTROL_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_VP1_CONTROL_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_HT_MASK                                            (0x0001C000U)
 #define CSL_DSS_VP1_CONTROL_HT_SHIFT                                           (0x0000000EU)
 #define CSL_DSS_VP1_CONTROL_HT_MAX                                             (0x00000007U)

 #define CSL_DSS_VP1_CONTROL_RESERVED1_MASK                                     (0x000E0000U)
 #define CSL_DSS_VP1_CONTROL_RESERVED1_SHIFT                                    (0x00000011U)
 #define CSL_DSS_VP1_CONTROL_RESERVED1_MAX                                      (0x00000007U)

 #define CSL_DSS_VP1_CONTROL_TDMENABLE_MASK                                     (0x00100000U)
 #define CSL_DSS_VP1_CONTROL_TDMENABLE_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VP1_CONTROL_TDMENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMDIS                               (0x0U)
 #define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMENB                               (0x1U)

 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MASK                               (0x00600000U)
 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MAX                                (0x00000003U)

 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT                      (0x0U)
 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT                      (0x1U)
 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT                     (0x2U)
 #define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT                     (0x3U)

 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MASK                                (0x01800000U)
 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_SHIFT                               (0x00000017U)
 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MAX                                 (0x00000003U)

 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX                      (0x0U)
 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX                      (0x1U)
 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX                      (0x2U)
 #define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX                     (0x3U)

 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MASK                                 (0x06000000U)
 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_SHIFT                                (0x00000019U)
 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MAX                                  (0x00000003U)

 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL                         (0x0U)
 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL                        (0x1U)
 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED                        (0x2U)
 #define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_RES                              (0x3U)

 #define CSL_DSS_VP1_CONTROL_RESERVED_MASK                                      (0x38000000U)
 #define CSL_DSS_VP1_CONTROL_RESERVED_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP1_CONTROL_RESERVED_MAX                                       (0x00000007U)

 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK                (0xC0000000U)
 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT               (0x0000001EU)
 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX                 (0x00000003U)

 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME        (0x0U)
 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES       (0x1U)
 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES      (0x2U)
 #define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED        (0x3U)

 /* CSC_COEF0 */

 #define CSL_DSS_VP1_CSC_COEF0_C00_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP1_CSC_COEF0_C00_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF0_C00_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP1_CSC_COEF0_C01_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP1_CSC_COEF0_C01_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF0_C01_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MAX                                  (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VP1_CSC_COEF1_C02_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP1_CSC_COEF1_C02_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF1_C02_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP1_CSC_COEF1_C10_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP1_CSC_COEF1_C10_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF1_C10_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MAX                                  (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VP1_CSC_COEF2_C11_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP1_CSC_COEF2_C11_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF2_C11_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP1_CSC_COEF2_C12_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP1_CSC_COEF2_C12_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF2_C12_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MAX                                  (0x0000001FU)

 /* DATA_CYCLE_0 */

 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_1 */

 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_2 */

 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MAX                                (0x0000000FU)

 /* LINE_NUMBER */

 #define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MASK                                  (0xFFFFC000U)
 #define CSL_DSS_VP1_LINE_NUMBER_RESERVED_SHIFT                                 (0x0000000EU)
 #define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MAX                                   (0x0003FFFFU)

 /* POL_FREQ */

 #define CSL_DSS_VP1_POL_FREQ_ACB_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP1_POL_FREQ_ACB_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP1_POL_FREQ_ACB_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP1_POL_FREQ_ACBI_MASK                                         (0x00000F00U)
 #define CSL_DSS_VP1_POL_FREQ_ACBI_SHIFT                                        (0x00000008U)
 #define CSL_DSS_VP1_POL_FREQ_ACBI_MAX                                          (0x0000000FU)

 #define CSL_DSS_VP1_POL_FREQ_IVS_MASK                                          (0x00001000U)
 #define CSL_DSS_VP1_POL_FREQ_IVS_SHIFT                                         (0x0000000CU)
 #define CSL_DSS_VP1_POL_FREQ_IVS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAH                                  (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAL                                  (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_IHS_MASK                                          (0x00002000U)
 #define CSL_DSS_VP1_POL_FREQ_IHS_SHIFT                                         (0x0000000DU)
 #define CSL_DSS_VP1_POL_FREQ_IHS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAH                                  (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAL                                  (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_IPC_MASK                                          (0x00004000U)
 #define CSL_DSS_VP1_POL_FREQ_IPC_SHIFT                                         (0x0000000EU)
 #define CSL_DSS_VP1_POL_FREQ_IPC_MAX                                           (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DRPCK                                     (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DFPCK                                     (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_IEO_MASK                                          (0x00008000U)
 #define CSL_DSS_VP1_POL_FREQ_IEO_SHIFT                                         (0x0000000FU)
 #define CSL_DSS_VP1_POL_FREQ_IEO_MAX                                           (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBAHIGH                                  (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBALOW                                   (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_RF_MASK                                           (0x00010000U)
 #define CSL_DSS_VP1_POL_FREQ_RF_SHIFT                                          (0x00000010U)
 #define CSL_DSS_VP1_POL_FREQ_RF_MAX                                            (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_RF_VAL_DFEDPCK                                    (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_RF_VAL_DRIEDPCK                                   (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_ONOFF_MASK                                        (0x00020000U)
 #define CSL_DSS_VP1_POL_FREQ_ONOFF_SHIFT                                       (0x00000011U)
 #define CSL_DSS_VP1_POL_FREQ_ONOFF_MAX                                         (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK                                (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16                                  (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_ALIGN_MASK                                        (0x00040000U)
 #define CSL_DSS_VP1_POL_FREQ_ALIGN_SHIFT                                       (0x00000012U)
 #define CSL_DSS_VP1_POL_FREQ_ALIGN_MAX                                         (0x00000001U)

 #define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED                              (0x0U)
 #define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED                                 (0x1U)

 #define CSL_DSS_VP1_POL_FREQ_RESERVED_MASK                                     (0xFFF80000U)
 #define CSL_DSS_VP1_POL_FREQ_RESERVED_SHIFT                                    (0x00000013U)
 #define CSL_DSS_VP1_POL_FREQ_RESERVED_MAX                                      (0x00001FFFU)

 /* SIZE_SCREEN */

 #define CSL_DSS_VP1_SIZE_SCREEN_PPL_MASK                                       (0x00003FFFU)
 #define CSL_DSS_VP1_SIZE_SCREEN_PPL_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VP1_SIZE_SCREEN_PPL_MAX                                        (0x00003FFFU)

 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MASK                                 (0x0000C000U)
 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MAX                                  (0x00000003U)

 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME                             (0x0U)
 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE                          (0x1U)
 #define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE                         (0x2U)

 #define CSL_DSS_VP1_SIZE_SCREEN_LPP_MASK                                       (0x3FFF0000U)
 #define CSL_DSS_VP1_SIZE_SCREEN_LPP_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VP1_SIZE_SCREEN_LPP_MAX                                        (0x00003FFFU)

 /* TIMING_H */

 #define CSL_DSS_VP1_TIMING_H_HSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP1_TIMING_H_HSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP1_TIMING_H_HSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP1_TIMING_H_HFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP1_TIMING_H_HFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP1_TIMING_H_HFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP1_TIMING_H_HBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP1_TIMING_H_HBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP1_TIMING_H_HBP_MAX                                           (0x00000FFFU)

 /* TIMING_V */

 #define CSL_DSS_VP1_TIMING_V_VSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP1_TIMING_V_VSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP1_TIMING_V_VSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP1_TIMING_V_VFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP1_TIMING_V_VFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP1_TIMING_V_VFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP1_TIMING_V_VBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP1_TIMING_V_VBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP1_TIMING_V_VBP_MAX                                           (0x00000FFFU)

 /* CSC_COEF3 */

 #define CSL_DSS_VP1_CSC_COEF3_C20_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP1_CSC_COEF3_C20_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF3_C20_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP1_CSC_COEF3_C21_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP1_CSC_COEF3_C21_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF3_C21_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MAX                                  (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VP1_CSC_COEF4_C22_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP1_CSC_COEF4_C22_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF4_C22_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MASK                                 (0xFFFFF800U)
 #define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MAX                                  (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VP1_CSC_COEF5_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP1_CSC_COEF5_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF5_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP1_CSC_COEF5_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MASK                                  (0xFFF80000U)
 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_SHIFT                                 (0x00000013U)
 #define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MAX                                   (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VP1_CSC_COEF6_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP1_CSC_COEF6_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF6_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP1_CSC_COEF6_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MAX                                  (0x00001FFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VP1_CSC_COEF7_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP1_CSC_COEF7_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP1_CSC_COEF7_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_SHIFT                                (0x00000003U)
 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP1_CSC_COEF7_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MAX                                  (0x00001FFFU)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MASK                              (0x00000001U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MAX                               (0x00000001U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                         (0x00000002U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                        (0x00000001U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                          (0x00000001U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE              (0x0U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK                (0x1U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                          (0x00000004U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                         (0x00000002U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                           (0x00000001U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                   (0x0U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                    (0x1U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MASK                           (0x000007F8U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                          (0x00000003U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MAX                            (0x000000FFU)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                           (0x00001800U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                          (0x0000000BU)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                            (0x00000003U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP                     (0x0U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                       (0x1U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                        (0x2U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                   (0x3U)

 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MASK                            (0xFFFFE000U)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_SHIFT                           (0x0000000DU)
 #define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MAX                             (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                       (0xFFFFFFFFU)
 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                      (0x00000000U)
 #define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                        (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VP1_SAFETY_POSITION_POSX_MASK                                  (0x00003FFFU)
 #define CSL_DSS_VP1_SAFETY_POSITION_POSX_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP1_SAFETY_POSITION_POSX_MAX                                   (0x00003FFFU)

 #define CSL_DSS_VP1_SAFETY_POSITION_POSY_MASK                                  (0x3FFF0000U)
 #define CSL_DSS_VP1_SAFETY_POSITION_POSY_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VP1_SAFETY_POSITION_POSY_MAX                                   (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                       (0x00000000U)
 #define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                         (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MAX                                      (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MASK                                 (0xFFFFFFFFU)
 #define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MAX                                  (0xFFFFFFFFU)

 /* GAMMA_TABLE_0 */

 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_1 */

 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_2 */

 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_3 */

 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_4 */

 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_5 */

 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_6 */

 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_7 */

 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_8 */

 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_9 */

 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_10 */

 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_11 */

 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_12 */

 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_13 */

 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_14 */

 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_15 */

 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MAX                                   (0x00000001U)

 /* DSS_OLDI_CFG */

 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MASK                                 (0xFFFFC000U)
 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MAX                                  (0x0003FFFFU)

 /* DSS_OLDI_STATUS */

 #define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MASK                              (0xFFFFFFFFU)
 #define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MAX                               (0xFFFFFFFFU)

 /* DSS_OLDI_LB */

 #define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MASK                                  (0xFFFFFFFFU)
 #define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MAX                                   (0xFFFFFFFFU)

 /* SECURE */

 #define CSL_DSS_VP1_SECURE_SECURE_MASK                                         (0x00000001U)
 #define CSL_DSS_VP1_SECURE_SECURE_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP1_SECURE_SECURE_MAX                                          (0x00000001U)

 #define CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREDIS                                (0x0U)
 #define CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREEN                                 (0x1U)

 #define CSL_DSS_VP1_SECURE_RESERVED_MASK                                       (0xFFFFFFFEU)
 #define CSL_DSS_VP1_SECURE_RESERVED_SHIFT                                      (0x00000001U)
 #define CSL_DSS_VP1_SECURE_RESERVED_MAX                                        (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : OVR2 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t VIRTUALVP;                 /* VIRTUALVP */
     volatile uint32_t DEFAULT_COLOR;             /* DEFAULT_COLOR */
     volatile uint32_t DEFAULT_COLOR2;            /* DEFAULT_COLOR2 */
     volatile uint32_t TRANS_COLOR_MAX;           /* TRANS_COLOR_MAX */
     volatile uint32_t TRANS_COLOR_MAX2;          /* TRANS_COLOR_MAX2 */
     volatile uint32_t TRANS_COLOR_MIN;           /* TRANS_COLOR_MIN */
     volatile uint32_t TRANS_COLOR_MIN2;          /* TRANS_COLOR_MIN2 */
     volatile uint32_t ATTRIBUTES[5U];            /* ATTRIBUTES 0..4 */
     volatile uint32_t ATTRIBUTES2[5U];           /* ATTRIBUTES2 0..4 */
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_ovr2Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_OVR2_CONFIG                                                    (0x00000000U)
 #define CSL_DSS_OVR2_VIRTUALVP                                                 (0x00000004U)
 #define CSL_DSS_OVR2_DEFAULT_COLOR                                             (0x00000008U)
 #define CSL_DSS_OVR2_DEFAULT_COLOR2                                            (0x0000000CU)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX                                           (0x00000010U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2                                          (0x00000014U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN                                           (0x00000018U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2                                          (0x0000001CU)
 #define CSL_DSS_OVR2_ATTRIBUTES(index)                                         (0x00000020U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR2_ATTRIBUTES2(index)                                        (0x00000034U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR2_SECURE                                                    (0x00000048U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_OVR2_CONFIG_RESERVED6_MASK                                     (0x00000001U)
 #define CSL_DSS_OVR2_CONFIG_RESERVED6_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR2_CONFIG_RESERVED6_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR2_CONFIG_COLORBAREN_MASK                                    (0x00000002U)
 #define CSL_DSS_OVR2_CONFIG_COLORBAREN_SHIFT                                   (0x00000001U)
 #define CSL_DSS_OVR2_CONFIG_COLORBAREN_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBARDIS                         (0x0U)
 #define CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBAREN                          (0x1U)

 #define CSL_DSS_OVR2_CONFIG_RESERVED_MASK                                      (0x000003FCU)
 #define CSL_DSS_OVR2_CONFIG_RESERVED_SHIFT                                     (0x00000002U)
 #define CSL_DSS_OVR2_CONFIG_RESERVED_MAX                                       (0x000000FFU)

 #define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MASK                                  (0x00000400U)
 #define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MAX                                   (0x00000001U)

 #define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_DISTCK                            (0x0U)
 #define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_ENBTCK                            (0x1U)

 #define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MASK                               (0x00000800U)
 #define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_SHIFT                              (0x0000000BU)
 #define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MAX                                (0x00000001U)

 #define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_GDTK                           (0x0U)
 #define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_VSTK                           (0x1U)

 #define CSL_DSS_OVR2_CONFIG_RESERVED2_MASK                                     (0x00001000U)
 #define CSL_DSS_OVR2_CONFIG_RESERVED2_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_OVR2_CONFIG_RESERVED2_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR2_CONFIG_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_OVR2_CONFIG_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_OVR2_CONFIG_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR2_CONFIG_RESERVED1_MASK                                     (0xFFFFC000U)
 #define CSL_DSS_OVR2_CONFIG_RESERVED1_SHIFT                                    (0x0000000EU)
 #define CSL_DSS_OVR2_CONFIG_RESERVED1_MAX                                      (0x0003FFFFU)

 /* VIRTUALVP */

 #define CSL_DSS_OVR2_VIRTUALVP_PPL_MASK                                        (0x00003FFFU)
 #define CSL_DSS_OVR2_VIRTUALVP_PPL_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR2_VIRTUALVP_PPL_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR2_VIRTUALVP_LPP_MASK                                        (0x3FFF0000U)
 #define CSL_DSS_OVR2_VIRTUALVP_LPP_SHIFT                                       (0x00000010U)
 #define CSL_DSS_OVR2_VIRTUALVP_LPP_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR2_VIRTUALVP_ENABLE_MASK                                     (0x80000000U)
 #define CSL_DSS_OVR2_VIRTUALVP_ENABLE_SHIFT                                    (0x0000001FU)
 #define CSL_DSS_OVR2_VIRTUALVP_ENABLE_MAX                                      (0x00000001U)

 /* DEFAULT_COLOR */

 #define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MASK                           (0xFFFFFFFFU)
 #define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT                          (0x00000000U)
 #define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MAX                            (0xFFFFFFFFU)

 /* DEFAULT_COLOR2 */

 #define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MASK                          (0x0000FFFFU)
 #define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT                         (0x00000000U)
 #define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MAX                           (0x0000FFFFU)

 #define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MASK                              (0xFFFF0000U)
 #define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_SHIFT                             (0x00000010U)
 #define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MAX                               (0x0000FFFFU)

 /* TRANS_COLOR_MAX */

 #define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MAX2 */

 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* TRANS_COLOR_MIN */

 #define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MIN2 */

 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* ATTRIBUTES */

 #define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MASK                                    (0x00000001U)
 #define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_SHIFT                                   (0x00000000U)
 #define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MASK                                 (0x0000001EU)
 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_SHIFT                                (0x00000001U)
 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MAX                                  (0x0000000FU)

 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID1                             (0x0U)
 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL1                            (0x1U)
 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID2                             (0x2U)
 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL2                            (0x3U)
 #define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIRTCH                           (0x4U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_OVR2_ATTRIBUTES2_POSX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_OVR2_ATTRIBUTES2_POSX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR2_ATTRIBUTES2_POSX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_OVR2_ATTRIBUTES2_POSY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_OVR2_ATTRIBUTES2_POSY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_OVR2_ATTRIBUTES2_POSY_MAX                                      (0x00003FFFU)

 /* SECURE */

 #define CSL_DSS_OVR2_SECURE_SECURE_MASK                                        (0x00000001U)
 #define CSL_DSS_OVR2_SECURE_SECURE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR2_SECURE_SECURE_MAX                                         (0x00000001U)

 #define CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREDIS                               (0x0U)
 #define CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREEN                                (0x1U)

 #define CSL_DSS_OVR2_SECURE_RESERVED_MASK                                      (0xFFFFFFFEU)
 #define CSL_DSS_OVR2_SECURE_RESERVED_SHIFT                                     (0x00000001U)
 #define CSL_DSS_OVR2_SECURE_RESERVED_MAX                                       (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VP2 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t CONTROL;                   /* CONTROL */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t DATA_CYCLE_0;              /* DATA_CYCLE_0 */
     volatile uint32_t DATA_CYCLE_1;              /* DATA_CYCLE_1 */
     volatile uint32_t DATA_CYCLE_2;              /* DATA_CYCLE_2 */
     volatile uint8_t  Resv_68[36];
     volatile uint32_t LINE_NUMBER;               /* LINE_NUMBER */
     volatile uint8_t  Resv_76[4];
     volatile uint32_t POL_FREQ;                  /* POL_FREQ */
     volatile uint32_t SIZE_SCREEN;               /* SIZE_SCREEN */
     volatile uint32_t TIMING_H;                  /* TIMING_H */
     volatile uint32_t TIMING_V;                  /* TIMING_V */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint32_t SAFETY_ATTRIBUTES[8U];     /* SAFETY_ATTRIBUTES 0..7 */
     volatile uint32_t SAFETY_CAPT_SIGNATURE[8U]; /* SAFETY_CAPT_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_POSITION[8U];       /* SAFETY_POSITION 0..7 */
     volatile uint32_t SAFETY_REF_SIGNATURE[8U];  /* SAFETY_REF_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_SIZE[8U];           /* SAFETY_SIZE 0..7 */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint8_t  Resv_288[12];
     volatile uint32_t GAMMA_TABLE_0;             /* GAMMA_TABLE_0 */
     volatile uint32_t GAMMA_TABLE_1;             /* GAMMA_TABLE_1 */
     volatile uint32_t GAMMA_TABLE_2;             /* GAMMA_TABLE_2 */
     volatile uint32_t GAMMA_TABLE_3;             /* GAMMA_TABLE_3 */
     volatile uint32_t GAMMA_TABLE_4;             /* GAMMA_TABLE_4 */
     volatile uint32_t GAMMA_TABLE_5;             /* GAMMA_TABLE_5 */
     volatile uint32_t GAMMA_TABLE_6;             /* GAMMA_TABLE_6 */
     volatile uint32_t GAMMA_TABLE_7;             /* GAMMA_TABLE_7 */
     volatile uint32_t GAMMA_TABLE_8;             /* GAMMA_TABLE_8 */
     volatile uint32_t GAMMA_TABLE_9;             /* GAMMA_TABLE_9 */
     volatile uint32_t GAMMA_TABLE_10;            /* GAMMA_TABLE_10 */
     volatile uint32_t GAMMA_TABLE_11;            /* GAMMA_TABLE_11 */
     volatile uint32_t GAMMA_TABLE_12;            /* GAMMA_TABLE_12 */
     volatile uint32_t GAMMA_TABLE_13;            /* GAMMA_TABLE_13 */
     volatile uint32_t GAMMA_TABLE_14;            /* GAMMA_TABLE_14 */
     volatile uint32_t GAMMA_TABLE_15;            /* GAMMA_TABLE_15 */
     volatile uint32_t DSS_OLDI_CFG;              /* DSS_OLDI_CFG */
     volatile uint32_t DSS_OLDI_STATUS;           /* DSS_OLDI_STATUS */
     volatile uint32_t DSS_OLDI_LB;               /* DSS_OLDI_LB */
     volatile uint8_t  Resv_376[12];
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_vp2Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VP2_CONFIG                                                     (0x00000000U)
 #define CSL_DSS_VP2_CONTROL                                                    (0x00000004U)
 #define CSL_DSS_VP2_CSC_COEF0                                                  (0x00000008U)
 #define CSL_DSS_VP2_CSC_COEF1                                                  (0x0000000CU)
 #define CSL_DSS_VP2_CSC_COEF2                                                  (0x00000010U)
 #define CSL_DSS_VP2_DATA_CYCLE_0                                               (0x00000014U)
 #define CSL_DSS_VP2_DATA_CYCLE_1                                               (0x00000018U)
 #define CSL_DSS_VP2_DATA_CYCLE_2                                               (0x0000001CU)
 #define CSL_DSS_VP2_LINE_NUMBER                                                (0x00000044U)
 #define CSL_DSS_VP2_POL_FREQ                                                   (0x0000004CU)
 #define CSL_DSS_VP2_SIZE_SCREEN                                                (0x00000050U)
 #define CSL_DSS_VP2_TIMING_H                                                   (0x00000054U)
 #define CSL_DSS_VP2_TIMING_V                                                   (0x00000058U)
 #define CSL_DSS_VP2_CSC_COEF3                                                  (0x0000005CU)
 #define CSL_DSS_VP2_CSC_COEF4                                                  (0x00000060U)
 #define CSL_DSS_VP2_CSC_COEF5                                                  (0x00000064U)
 #define CSL_DSS_VP2_CSC_COEF6                                                  (0x00000068U)
 #define CSL_DSS_VP2_CSC_COEF7                                                  (0x0000006CU)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES(index)                                   (0x00000070U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE(index)                               (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP2_SAFETY_POSITION(index)                                     (0x000000B0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP2_SAFETY_REF_SIGNATURE(index)                                (0x000000D0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP2_SAFETY_SIZE(index)                                         (0x000000F0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP2_SAFETY_LFSR_SEED                                           (0x00000110U)
 #define CSL_DSS_VP2_GAMMA_TABLE_0                                              (0x00000120U)
 #define CSL_DSS_VP2_GAMMA_TABLE_1                                              (0x00000124U)
 #define CSL_DSS_VP2_GAMMA_TABLE_2                                              (0x00000128U)
 #define CSL_DSS_VP2_GAMMA_TABLE_3                                              (0x0000012CU)
 #define CSL_DSS_VP2_GAMMA_TABLE_4                                              (0x00000130U)
 #define CSL_DSS_VP2_GAMMA_TABLE_5                                              (0x00000134U)
 #define CSL_DSS_VP2_GAMMA_TABLE_6                                              (0x00000138U)
 #define CSL_DSS_VP2_GAMMA_TABLE_7                                              (0x0000013CU)
 #define CSL_DSS_VP2_GAMMA_TABLE_8                                              (0x00000140U)
 #define CSL_DSS_VP2_GAMMA_TABLE_9                                              (0x00000144U)
 #define CSL_DSS_VP2_GAMMA_TABLE_10                                             (0x00000148U)
 #define CSL_DSS_VP2_GAMMA_TABLE_11                                             (0x0000014CU)
 #define CSL_DSS_VP2_GAMMA_TABLE_12                                             (0x00000150U)
 #define CSL_DSS_VP2_GAMMA_TABLE_13                                             (0x00000154U)
 #define CSL_DSS_VP2_GAMMA_TABLE_14                                             (0x00000158U)
 #define CSL_DSS_VP2_GAMMA_TABLE_15                                             (0x0000015CU)
 #define CSL_DSS_VP2_DSS_OLDI_CFG                                               (0x00000160U)
 #define CSL_DSS_VP2_DSS_OLDI_STATUS                                            (0x00000164U)
 #define CSL_DSS_VP2_DSS_OLDI_LB                                                (0x00000168U)
 #define CSL_DSS_VP2_SECURE                                                     (0x00000178U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_VP2_CONFIG_PIXELGATED_MASK                                     (0x00000001U)
 #define CSL_DSS_VP2_CONFIG_PIXELGATED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP2_CONFIG_PIXELGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGA                             (0x0U)
 #define CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGV                             (0x1U)

 #define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MASK                                (0x00000002U)
 #define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_SHIFT                               (0x00000001U)
 #define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGDIS                          (0x0U)
 #define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGENB                          (0x1U)

 #define CSL_DSS_VP2_CONFIG_GAMMAENABLE_MASK                                    (0x00000004U)
 #define CSL_DSS_VP2_CONFIG_GAMMAENABLE_SHIFT                                   (0x00000002U)
 #define CSL_DSS_VP2_CONFIG_GAMMAENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMADIS                            (0x0U)
 #define CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMAENB                            (0x1U)

 #define CSL_DSS_VP2_CONFIG_HDMIMODE_MASK                                       (0x00000008U)
 #define CSL_DSS_VP2_CONFIG_HDMIMODE_SHIFT                                      (0x00000003U)
 #define CSL_DSS_VP2_CONFIG_HDMIMODE_MAX                                        (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MASK                                 (0x00000010U)
 #define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_SHIFT                                (0x00000004U)
 #define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MAX                                  (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGDIS                           (0x0U)
 #define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGENB                           (0x1U)

 #define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MASK                                (0x00000020U)
 #define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_SHIFT                               (0x00000005U)
 #define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS                          (0x0U)
 #define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGENB                          (0x1U)

 #define CSL_DSS_VP2_CONFIG_HSYNCGATED_MASK                                     (0x00000040U)
 #define CSL_DSS_VP2_CONFIG_HSYNCGATED_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP2_CONFIG_HSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGDIS                                (0x0U)
 #define CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGENB                                (0x1U)

 #define CSL_DSS_VP2_CONFIG_VSYNCGATED_MASK                                     (0x00000080U)
 #define CSL_DSS_VP2_CONFIG_VSYNCGATED_SHIFT                                    (0x00000007U)
 #define CSL_DSS_VP2_CONFIG_VSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGDIS                                (0x0U)
 #define CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGENB                                (0x1U)

 #define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MASK                                 (0x00000100U)
 #define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_SHIFT                                (0x00000008U)
 #define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MAX                                  (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_RESERVED1_MASK                                      (0x00007E00U)
 #define CSL_DSS_VP2_CONFIG_RESERVED1_SHIFT                                     (0x00000009U)
 #define CSL_DSS_VP2_CONFIG_RESERVED1_MAX                                       (0x0000003FU)

 #define CSL_DSS_VP2_CONFIG_CPR_MASK                                            (0x00008000U)
 #define CSL_DSS_VP2_CONFIG_CPR_SHIFT                                           (0x0000000FU)
 #define CSL_DSS_VP2_CONFIG_CPR_MAX                                             (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MASK                                (0x00010000U)
 #define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_SHIFT                               (0x00000010U)
 #define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_RESERVED2_MASK                                      (0x000E0000U)
 #define CSL_DSS_VP2_CONFIG_RESERVED2_SHIFT                                     (0x00000011U)
 #define CSL_DSS_VP2_CONFIG_RESERVED2_MAX                                       (0x00000007U)

 #define CSL_DSS_VP2_CONFIG_BT656ENABLE_MASK                                    (0x00100000U)
 #define CSL_DSS_VP2_CONFIG_BT656ENABLE_SHIFT                                   (0x00000014U)
 #define CSL_DSS_VP2_CONFIG_BT656ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_DISABLE                             (0x0U)
 #define CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_ENABLE                              (0x1U)

 #define CSL_DSS_VP2_CONFIG_BT1120ENABLE_MASK                                   (0x00200000U)
 #define CSL_DSS_VP2_CONFIG_BT1120ENABLE_SHIFT                                  (0x00000015U)
 #define CSL_DSS_VP2_CONFIG_BT1120ENABLE_MAX                                    (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_DISABLE                            (0x0U)
 #define CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_ENABLE                             (0x1U)

 #define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MASK                               (0x00400000U)
 #define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_SHIFT                              (0x00000016U)
 #define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE                        (0x0U)
 #define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE                         (0x1U)

 #define CSL_DSS_VP2_CONFIG_FIDFIRST_MASK                                       (0x00800000U)
 #define CSL_DSS_VP2_CONFIG_FIDFIRST_SHIFT                                      (0x00000017U)
 #define CSL_DSS_VP2_CONFIG_FIDFIRST_MAX                                        (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_EVEN                                   (0x0U)
 #define CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_ODD                                    (0x1U)

 #define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MASK                                (0x01000000U)
 #define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_SHIFT                               (0x00000018U)
 #define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS                       (0x0U)
 #define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCENB                       (0x1U)

 #define CSL_DSS_VP2_CONFIG_FULLRANGE_MASK                                      (0x02000000U)
 #define CSL_DSS_VP2_CONFIG_FULLRANGE_SHIFT                                     (0x00000019U)
 #define CSL_DSS_VP2_CONFIG_FULLRANGE_MAX                                       (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_LIMRANGE                              (0x0U)
 #define CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_FULLRANGE                             (0x1U)

 #define CSL_DSS_VP2_CONFIG_COLORCONVPOS_MASK                                   (0x04000000U)
 #define CSL_DSS_VP2_CONFIG_COLORCONVPOS_SHIFT                                  (0x0000001AU)
 #define CSL_DSS_VP2_CONFIG_COLORCONVPOS_MAX                                    (0x00000001U)

 #define CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA                         (0x0U)
 #define CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA                        (0x1U)

 #define CSL_DSS_VP2_CONFIG_RESERVED3_MASK                                      (0xF8000000U)
 #define CSL_DSS_VP2_CONFIG_RESERVED3_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP2_CONFIG_RESERVED3_MAX                                       (0x0000001FU)

 /* CONTROL */

 #define CSL_DSS_VP2_CONTROL_ENABLE_MASK                                        (0x00000001U)
 #define CSL_DSS_VP2_CONTROL_ENABLE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VP2_CONTROL_ENABLE_MAX                                         (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPDIS                                (0x0U)
 #define CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPENB                                (0x1U)

 #define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MASK                        (0x00000002U)
 #define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_SHIFT                       (0x00000001U)
 #define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MAX                         (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS                  (0x0U)
 #define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN                   (0x1U)

 #define CSL_DSS_VP2_CONTROL_MONOCOLOR_MASK                                     (0x00000004U)
 #define CSL_DSS_VP2_CONTROL_MONOCOLOR_SHIFT                                    (0x00000002U)
 #define CSL_DSS_VP2_CONTROL_MONOCOLOR_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_STN_MASK                                           (0x00000008U)
 #define CSL_DSS_VP2_CONTROL_STN_SHIFT                                          (0x00000003U)
 #define CSL_DSS_VP2_CONTROL_STN_MAX                                            (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_M8B_MASK                                           (0x00000010U)
 #define CSL_DSS_VP2_CONTROL_M8B_SHIFT                                          (0x00000004U)
 #define CSL_DSS_VP2_CONTROL_M8B_MAX                                            (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_GOBIT_MASK                                         (0x00000020U)
 #define CSL_DSS_VP2_CONTROL_GOBIT_SHIFT                                        (0x00000005U)
 #define CSL_DSS_VP2_CONTROL_GOBIT_MAX                                          (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_GOBIT_VAL_HFUISR                                   (0x0U)
 #define CSL_DSS_VP2_CONTROL_GOBIT_VAL_UFPSR                                    (0x1U)

 #define CSL_DSS_VP2_CONTROL_DPIENABLE_MASK                                     (0x00000040U)
 #define CSL_DSS_VP2_CONTROL_DPIENABLE_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP2_CONTROL_DPIENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPDIS                             (0x0U)
 #define CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPENB                             (0x1U)

 #define CSL_DSS_VP2_CONTROL_STDITHERENABLE_MASK                                (0x00000080U)
 #define CSL_DSS_VP2_CONTROL_STDITHERENABLE_SHIFT                               (0x00000007U)
 #define CSL_DSS_VP2_CONTROL_STDITHERENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHDIS                       (0x0U)
 #define CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHENB                       (0x1U)

 #define CSL_DSS_VP2_CONTROL_DATALINES_MASK                                     (0x00000700U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_SHIFT                                    (0x00000008U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_MAX                                      (0x00000007U)

 #define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB12B                             (0x0U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB16B                             (0x1U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB18B                             (0x2U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB24B                             (0x3U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB30B                             (0x4U)
 #define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB36B                             (0x5U)

 #define CSL_DSS_VP2_CONTROL_STALLMODE_MASK                                     (0x00000800U)
 #define CSL_DSS_VP2_CONTROL_STALLMODE_SHIFT                                    (0x0000000BU)
 #define CSL_DSS_VP2_CONTROL_STALLMODE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLDIS                             (0x0U)
 #define CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLENB                             (0x1U)

 #define CSL_DSS_VP2_CONTROL_STALLMODETYPE_MASK                                 (0x00001000U)
 #define CSL_DSS_VP2_CONTROL_STALLMODETYPE_SHIFT                                (0x0000000CU)
 #define CSL_DSS_VP2_CONTROL_STALLMODETYPE_MAX                                  (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_COMMANDMODE                      (0x0U)
 #define CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_VIDEOMODE                        (0x1U)

 #define CSL_DSS_VP2_CONTROL_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_VP2_CONTROL_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_VP2_CONTROL_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_HT_MASK                                            (0x0001C000U)
 #define CSL_DSS_VP2_CONTROL_HT_SHIFT                                           (0x0000000EU)
 #define CSL_DSS_VP2_CONTROL_HT_MAX                                             (0x00000007U)

 #define CSL_DSS_VP2_CONTROL_RESERVED1_MASK                                     (0x000E0000U)
 #define CSL_DSS_VP2_CONTROL_RESERVED1_SHIFT                                    (0x00000011U)
 #define CSL_DSS_VP2_CONTROL_RESERVED1_MAX                                      (0x00000007U)

 #define CSL_DSS_VP2_CONTROL_TDMENABLE_MASK                                     (0x00100000U)
 #define CSL_DSS_VP2_CONTROL_TDMENABLE_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VP2_CONTROL_TDMENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMDIS                               (0x0U)
 #define CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMENB                               (0x1U)

 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MASK                               (0x00600000U)
 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MAX                                (0x00000003U)

 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT                      (0x0U)
 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT                      (0x1U)
 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT                     (0x2U)
 #define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT                     (0x3U)

 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MASK                                (0x01800000U)
 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_SHIFT                               (0x00000017U)
 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MAX                                 (0x00000003U)

 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX                      (0x0U)
 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX                      (0x1U)
 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX                      (0x2U)
 #define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX                     (0x3U)

 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MASK                                 (0x06000000U)
 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_SHIFT                                (0x00000019U)
 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MAX                                  (0x00000003U)

 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL                         (0x0U)
 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL                        (0x1U)
 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED                        (0x2U)
 #define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_RES                              (0x3U)

 #define CSL_DSS_VP2_CONTROL_RESERVED_MASK                                      (0x38000000U)
 #define CSL_DSS_VP2_CONTROL_RESERVED_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP2_CONTROL_RESERVED_MAX                                       (0x00000007U)

 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK                (0xC0000000U)
 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT               (0x0000001EU)
 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX                 (0x00000003U)

 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME        (0x0U)
 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES       (0x1U)
 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES      (0x2U)
 #define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED        (0x3U)

 /* CSC_COEF0 */

 #define CSL_DSS_VP2_CSC_COEF0_C00_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP2_CSC_COEF0_C00_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF0_C00_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP2_CSC_COEF0_C01_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP2_CSC_COEF0_C01_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF0_C01_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MAX                                  (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VP2_CSC_COEF1_C02_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP2_CSC_COEF1_C02_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF1_C02_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP2_CSC_COEF1_C10_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP2_CSC_COEF1_C10_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF1_C10_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MAX                                  (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VP2_CSC_COEF2_C11_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP2_CSC_COEF2_C11_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF2_C11_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP2_CSC_COEF2_C12_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP2_CSC_COEF2_C12_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF2_C12_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MAX                                  (0x0000001FU)

 /* DATA_CYCLE_0 */

 #define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_1 */

 #define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_2 */

 #define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MAX                                (0x0000000FU)

 /* LINE_NUMBER */

 #define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP2_LINE_NUMBER_RESERVED_MASK                                  (0xFFFFC000U)
 #define CSL_DSS_VP2_LINE_NUMBER_RESERVED_SHIFT                                 (0x0000000EU)
 #define CSL_DSS_VP2_LINE_NUMBER_RESERVED_MAX                                   (0x0003FFFFU)

 /* POL_FREQ */

 #define CSL_DSS_VP2_POL_FREQ_ACB_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP2_POL_FREQ_ACB_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP2_POL_FREQ_ACB_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP2_POL_FREQ_ACBI_MASK                                         (0x00000F00U)
 #define CSL_DSS_VP2_POL_FREQ_ACBI_SHIFT                                        (0x00000008U)
 #define CSL_DSS_VP2_POL_FREQ_ACBI_MAX                                          (0x0000000FU)

 #define CSL_DSS_VP2_POL_FREQ_IVS_MASK                                          (0x00001000U)
 #define CSL_DSS_VP2_POL_FREQ_IVS_SHIFT                                         (0x0000000CU)
 #define CSL_DSS_VP2_POL_FREQ_IVS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAH                                  (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAL                                  (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_IHS_MASK                                          (0x00002000U)
 #define CSL_DSS_VP2_POL_FREQ_IHS_SHIFT                                         (0x0000000DU)
 #define CSL_DSS_VP2_POL_FREQ_IHS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAH                                  (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAL                                  (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_IPC_MASK                                          (0x00004000U)
 #define CSL_DSS_VP2_POL_FREQ_IPC_SHIFT                                         (0x0000000EU)
 #define CSL_DSS_VP2_POL_FREQ_IPC_MAX                                           (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_IPC_VAL_DRPCK                                     (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_IPC_VAL_DFPCK                                     (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_IEO_MASK                                          (0x00008000U)
 #define CSL_DSS_VP2_POL_FREQ_IEO_SHIFT                                         (0x0000000FU)
 #define CSL_DSS_VP2_POL_FREQ_IEO_MAX                                           (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBAHIGH                                  (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBALOW                                   (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_RF_MASK                                           (0x00010000U)
 #define CSL_DSS_VP2_POL_FREQ_RF_SHIFT                                          (0x00000010U)
 #define CSL_DSS_VP2_POL_FREQ_RF_MAX                                            (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_RF_VAL_DFEDPCK                                    (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_RF_VAL_DRIEDPCK                                   (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_ONOFF_MASK                                        (0x00020000U)
 #define CSL_DSS_VP2_POL_FREQ_ONOFF_SHIFT                                       (0x00000011U)
 #define CSL_DSS_VP2_POL_FREQ_ONOFF_MAX                                         (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DOPEDPCK                                (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DBIT16                                  (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_ALIGN_MASK                                        (0x00040000U)
 #define CSL_DSS_VP2_POL_FREQ_ALIGN_SHIFT                                       (0x00000012U)
 #define CSL_DSS_VP2_POL_FREQ_ALIGN_MAX                                         (0x00000001U)

 #define CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_NOTALIGNED                              (0x0U)
 #define CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_ALIGNED                                 (0x1U)

 #define CSL_DSS_VP2_POL_FREQ_RESERVED_MASK                                     (0xFFF80000U)
 #define CSL_DSS_VP2_POL_FREQ_RESERVED_SHIFT                                    (0x00000013U)
 #define CSL_DSS_VP2_POL_FREQ_RESERVED_MAX                                      (0x00001FFFU)

 /* SIZE_SCREEN */

 #define CSL_DSS_VP2_SIZE_SCREEN_PPL_MASK                                       (0x00003FFFU)
 #define CSL_DSS_VP2_SIZE_SCREEN_PPL_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VP2_SIZE_SCREEN_PPL_MAX                                        (0x00003FFFU)

 #define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MASK                                 (0x0000C000U)
 #define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MAX                                  (0x00000003U)

 #define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_SAME                             (0x0U)
 #define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE                          (0x1U)
 #define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE                         (0x2U)

 #define CSL_DSS_VP2_SIZE_SCREEN_LPP_MASK                                       (0x3FFF0000U)
 #define CSL_DSS_VP2_SIZE_SCREEN_LPP_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VP2_SIZE_SCREEN_LPP_MAX                                        (0x00003FFFU)

 /* TIMING_H */

 #define CSL_DSS_VP2_TIMING_H_HSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP2_TIMING_H_HSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP2_TIMING_H_HSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP2_TIMING_H_HFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP2_TIMING_H_HFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP2_TIMING_H_HFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP2_TIMING_H_HBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP2_TIMING_H_HBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP2_TIMING_H_HBP_MAX                                           (0x00000FFFU)

 /* TIMING_V */

 #define CSL_DSS_VP2_TIMING_V_VSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP2_TIMING_V_VSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP2_TIMING_V_VSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP2_TIMING_V_VFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP2_TIMING_V_VFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP2_TIMING_V_VFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP2_TIMING_V_VBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP2_TIMING_V_VBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP2_TIMING_V_VBP_MAX                                           (0x00000FFFU)

 /* CSC_COEF3 */

 #define CSL_DSS_VP2_CSC_COEF3_C20_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP2_CSC_COEF3_C20_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF3_C20_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP2_CSC_COEF3_C21_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP2_CSC_COEF3_C21_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF3_C21_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MAX                                  (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VP2_CSC_COEF4_C22_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP2_CSC_COEF4_C22_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF4_C22_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MASK                                 (0xFFFFF800U)
 #define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MAX                                  (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VP2_CSC_COEF5_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP2_CSC_COEF5_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF5_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP2_CSC_COEF5_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP2_CSC_COEF5_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF5_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MASK                                  (0xFFF80000U)
 #define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_SHIFT                                 (0x00000013U)
 #define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MAX                                   (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VP2_CSC_COEF6_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP2_CSC_COEF6_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF6_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP2_CSC_COEF6_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP2_CSC_COEF6_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF6_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MAX                                  (0x00001FFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VP2_CSC_COEF7_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP2_CSC_COEF7_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP2_CSC_COEF7_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_SHIFT                                (0x00000003U)
 #define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VP2_CSC_COEF7_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP2_CSC_COEF7_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP2_CSC_COEF7_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MAX                                  (0x00001FFFU)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MASK                              (0x00000001U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MAX                               (0x00000001U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                         (0x00000002U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                        (0x00000001U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                          (0x00000001U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE              (0x0U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK                (0x1U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                          (0x00000004U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                         (0x00000002U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                           (0x00000001U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                   (0x0U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                    (0x1U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MASK                           (0x000007F8U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                          (0x00000003U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MAX                            (0x000000FFU)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                           (0x00001800U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                          (0x0000000BU)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                            (0x00000003U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP                     (0x0U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                       (0x1U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                        (0x2U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                   (0x3U)

 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MASK                            (0xFFFFE000U)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_SHIFT                           (0x0000000DU)
 #define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MAX                             (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                       (0xFFFFFFFFU)
 #define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                      (0x00000000U)
 #define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                        (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VP2_SAFETY_POSITION_POSX_MASK                                  (0x00003FFFU)
 #define CSL_DSS_VP2_SAFETY_POSITION_POSX_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP2_SAFETY_POSITION_POSX_MAX                                   (0x00003FFFU)

 #define CSL_DSS_VP2_SAFETY_POSITION_POSY_MASK                                  (0x3FFF0000U)
 #define CSL_DSS_VP2_SAFETY_POSITION_POSY_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VP2_SAFETY_POSITION_POSY_MAX                                   (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                       (0x00000000U)
 #define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                         (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MAX                                      (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MASK                                 (0xFFFFFFFFU)
 #define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MAX                                  (0xFFFFFFFFU)

 /* GAMMA_TABLE_0 */

 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_1 */

 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_2 */

 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_3 */

 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_4 */

 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_5 */

 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_6 */

 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_7 */

 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_8 */

 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_9 */

 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_10 */

 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_11 */

 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_12 */

 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_13 */

 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_14 */

 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_15 */

 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MAX                                   (0x00000001U)

 /* DSS_OLDI_CFG */

 #define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MASK                                 (0xFFFFC000U)
 #define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MAX                                  (0x0003FFFFU)

 /* DSS_OLDI_STATUS */

 #define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MASK                              (0xFFFFFFFFU)
 #define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MAX                               (0xFFFFFFFFU)

 /* DSS_OLDI_LB */

 #define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MASK                                  (0xFFFFFFFFU)
 #define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MAX                                   (0xFFFFFFFFU)

 /* SECURE */

 #define CSL_DSS_VP2_SECURE_SECURE_MASK                                         (0x00000001U)
 #define CSL_DSS_VP2_SECURE_SECURE_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP2_SECURE_SECURE_MAX                                          (0x00000001U)

 #define CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREDIS                                (0x0U)
 #define CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREEN                                 (0x1U)

 #define CSL_DSS_VP2_SECURE_RESERVED_MASK                                       (0xFFFFFFFEU)
 #define CSL_DSS_VP2_SECURE_RESERVED_SHIFT                                      (0x00000001U)
 #define CSL_DSS_VP2_SECURE_RESERVED_MAX                                        (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : OVR3 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t VIRTUALVP;                 /* VIRTUALVP */
     volatile uint32_t DEFAULT_COLOR;             /* DEFAULT_COLOR */
     volatile uint32_t DEFAULT_COLOR2;            /* DEFAULT_COLOR2 */
     volatile uint32_t TRANS_COLOR_MAX;           /* TRANS_COLOR_MAX */
     volatile uint32_t TRANS_COLOR_MAX2;          /* TRANS_COLOR_MAX2 */
     volatile uint32_t TRANS_COLOR_MIN;           /* TRANS_COLOR_MIN */
     volatile uint32_t TRANS_COLOR_MIN2;          /* TRANS_COLOR_MIN2 */
     volatile uint32_t ATTRIBUTES[5U];            /* ATTRIBUTES 0..4 */
     volatile uint32_t ATTRIBUTES2[5U];           /* ATTRIBUTES2 0..4 */
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_ovr3Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_OVR3_CONFIG                                                    (0x00000000U)
 #define CSL_DSS_OVR3_VIRTUALVP                                                 (0x00000004U)
 #define CSL_DSS_OVR3_DEFAULT_COLOR                                             (0x00000008U)
 #define CSL_DSS_OVR3_DEFAULT_COLOR2                                            (0x0000000CU)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX                                           (0x00000010U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2                                          (0x00000014U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN                                           (0x00000018U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2                                          (0x0000001CU)
 #define CSL_DSS_OVR3_ATTRIBUTES(index)                                         (0x00000020U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR3_ATTRIBUTES2(index)                                        (0x00000034U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR3_SECURE                                                    (0x00000048U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_OVR3_CONFIG_RESERVED6_MASK                                     (0x00000001U)
 #define CSL_DSS_OVR3_CONFIG_RESERVED6_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR3_CONFIG_RESERVED6_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR3_CONFIG_COLORBAREN_MASK                                    (0x00000002U)
 #define CSL_DSS_OVR3_CONFIG_COLORBAREN_SHIFT                                   (0x00000001U)
 #define CSL_DSS_OVR3_CONFIG_COLORBAREN_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBARDIS                         (0x0U)
 #define CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBAREN                          (0x1U)

 #define CSL_DSS_OVR3_CONFIG_RESERVED_MASK                                      (0x000003FCU)
 #define CSL_DSS_OVR3_CONFIG_RESERVED_SHIFT                                     (0x00000002U)
 #define CSL_DSS_OVR3_CONFIG_RESERVED_MAX                                       (0x000000FFU)

 #define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MASK                                  (0x00000400U)
 #define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MAX                                   (0x00000001U)

 #define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_DISTCK                            (0x0U)
 #define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_ENBTCK                            (0x1U)

 #define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MASK                               (0x00000800U)
 #define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_SHIFT                              (0x0000000BU)
 #define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MAX                                (0x00000001U)

 #define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_GDTK                           (0x0U)
 #define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_VSTK                           (0x1U)

 #define CSL_DSS_OVR3_CONFIG_RESERVED2_MASK                                     (0x00001000U)
 #define CSL_DSS_OVR3_CONFIG_RESERVED2_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_OVR3_CONFIG_RESERVED2_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR3_CONFIG_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_OVR3_CONFIG_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_OVR3_CONFIG_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR3_CONFIG_RESERVED1_MASK                                     (0xFFFFC000U)
 #define CSL_DSS_OVR3_CONFIG_RESERVED1_SHIFT                                    (0x0000000EU)
 #define CSL_DSS_OVR3_CONFIG_RESERVED1_MAX                                      (0x0003FFFFU)

 /* VIRTUALVP */

 #define CSL_DSS_OVR3_VIRTUALVP_PPL_MASK                                        (0x00003FFFU)
 #define CSL_DSS_OVR3_VIRTUALVP_PPL_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR3_VIRTUALVP_PPL_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR3_VIRTUALVP_LPP_MASK                                        (0x3FFF0000U)
 #define CSL_DSS_OVR3_VIRTUALVP_LPP_SHIFT                                       (0x00000010U)
 #define CSL_DSS_OVR3_VIRTUALVP_LPP_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR3_VIRTUALVP_ENABLE_MASK                                     (0x80000000U)
 #define CSL_DSS_OVR3_VIRTUALVP_ENABLE_SHIFT                                    (0x0000001FU)
 #define CSL_DSS_OVR3_VIRTUALVP_ENABLE_MAX                                      (0x00000001U)

 /* DEFAULT_COLOR */

 #define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MASK                           (0xFFFFFFFFU)
 #define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT                          (0x00000000U)
 #define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MAX                            (0xFFFFFFFFU)

 /* DEFAULT_COLOR2 */

 #define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MASK                          (0x0000FFFFU)
 #define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT                         (0x00000000U)
 #define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MAX                           (0x0000FFFFU)

 #define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MASK                              (0xFFFF0000U)
 #define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_SHIFT                             (0x00000010U)
 #define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MAX                               (0x0000FFFFU)

 /* TRANS_COLOR_MAX */

 #define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MAX2 */

 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* TRANS_COLOR_MIN */

 #define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MIN2 */

 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* ATTRIBUTES */

 #define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MASK                                    (0x00000001U)
 #define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_SHIFT                                   (0x00000000U)
 #define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MASK                                 (0x0000001EU)
 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_SHIFT                                (0x00000001U)
 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MAX                                  (0x0000000FU)

 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID1                             (0x0U)
 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL1                            (0x1U)
 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID2                             (0x2U)
 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL2                            (0x3U)
 #define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIRTCH                           (0x4U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_OVR3_ATTRIBUTES2_POSX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_OVR3_ATTRIBUTES2_POSX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR3_ATTRIBUTES2_POSX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_OVR3_ATTRIBUTES2_POSY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_OVR3_ATTRIBUTES2_POSY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_OVR3_ATTRIBUTES2_POSY_MAX                                      (0x00003FFFU)

 /* SECURE */

 #define CSL_DSS_OVR3_SECURE_SECURE_MASK                                        (0x00000001U)
 #define CSL_DSS_OVR3_SECURE_SECURE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR3_SECURE_SECURE_MAX                                         (0x00000001U)

 #define CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREDIS                               (0x0U)
 #define CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREEN                                (0x1U)

 #define CSL_DSS_OVR3_SECURE_RESERVED_MASK                                      (0xFFFFFFFEU)
 #define CSL_DSS_OVR3_SECURE_RESERVED_SHIFT                                     (0x00000001U)
 #define CSL_DSS_OVR3_SECURE_RESERVED_MAX                                       (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VP3 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t CONTROL;                   /* CONTROL */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t DATA_CYCLE_0;              /* DATA_CYCLE_0 */
     volatile uint32_t DATA_CYCLE_1;              /* DATA_CYCLE_1 */
     volatile uint32_t DATA_CYCLE_2;              /* DATA_CYCLE_2 */
     volatile uint8_t  Resv_68[36];
     volatile uint32_t LINE_NUMBER;               /* LINE_NUMBER */
     volatile uint8_t  Resv_76[4];
     volatile uint32_t POL_FREQ;                  /* POL_FREQ */
     volatile uint32_t SIZE_SCREEN;               /* SIZE_SCREEN */
     volatile uint32_t TIMING_H;                  /* TIMING_H */
     volatile uint32_t TIMING_V;                  /* TIMING_V */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint32_t SAFETY_ATTRIBUTES[8U];     /* SAFETY_ATTRIBUTES 0..7 */
     volatile uint32_t SAFETY_CAPT_SIGNATURE[8U]; /* SAFETY_CAPT_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_POSITION[8U];       /* SAFETY_POSITION 0..7 */
     volatile uint32_t SAFETY_REF_SIGNATURE[8U];  /* SAFETY_REF_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_SIZE[8U];           /* SAFETY_SIZE 0..7 */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint8_t  Resv_288[12];
     volatile uint32_t GAMMA_TABLE_0;             /* GAMMA_TABLE_0 */
     volatile uint32_t GAMMA_TABLE_1;             /* GAMMA_TABLE_1 */
     volatile uint32_t GAMMA_TABLE_2;             /* GAMMA_TABLE_2 */
     volatile uint32_t GAMMA_TABLE_3;             /* GAMMA_TABLE_3 */
     volatile uint32_t GAMMA_TABLE_4;             /* GAMMA_TABLE_4 */
     volatile uint32_t GAMMA_TABLE_5;             /* GAMMA_TABLE_5 */
     volatile uint32_t GAMMA_TABLE_6;             /* GAMMA_TABLE_6 */
     volatile uint32_t GAMMA_TABLE_7;             /* GAMMA_TABLE_7 */
     volatile uint32_t GAMMA_TABLE_8;             /* GAMMA_TABLE_8 */
     volatile uint32_t GAMMA_TABLE_9;             /* GAMMA_TABLE_9 */
     volatile uint32_t GAMMA_TABLE_10;            /* GAMMA_TABLE_10 */
     volatile uint32_t GAMMA_TABLE_11;            /* GAMMA_TABLE_11 */
     volatile uint32_t GAMMA_TABLE_12;            /* GAMMA_TABLE_12 */
     volatile uint32_t GAMMA_TABLE_13;            /* GAMMA_TABLE_13 */
     volatile uint32_t GAMMA_TABLE_14;            /* GAMMA_TABLE_14 */
     volatile uint32_t GAMMA_TABLE_15;            /* GAMMA_TABLE_15 */
     volatile uint32_t DSS_OLDI_CFG;              /* DSS_OLDI_CFG */
     volatile uint32_t DSS_OLDI_STATUS;           /* DSS_OLDI_STATUS */
     volatile uint32_t DSS_OLDI_LB;               /* DSS_OLDI_LB */
     volatile uint8_t  Resv_376[12];
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_vp3Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VP3_CONFIG                                                     (0x00000000U)
 #define CSL_DSS_VP3_CONTROL                                                    (0x00000004U)
 #define CSL_DSS_VP3_CSC_COEF0                                                  (0x00000008U)
 #define CSL_DSS_VP3_CSC_COEF1                                                  (0x0000000CU)
 #define CSL_DSS_VP3_CSC_COEF2                                                  (0x00000010U)
 #define CSL_DSS_VP3_DATA_CYCLE_0                                               (0x00000014U)
 #define CSL_DSS_VP3_DATA_CYCLE_1                                               (0x00000018U)
 #define CSL_DSS_VP3_DATA_CYCLE_2                                               (0x0000001CU)
 #define CSL_DSS_VP3_LINE_NUMBER                                                (0x00000044U)
 #define CSL_DSS_VP3_POL_FREQ                                                   (0x0000004CU)
 #define CSL_DSS_VP3_SIZE_SCREEN                                                (0x00000050U)
 #define CSL_DSS_VP3_TIMING_H                                                   (0x00000054U)
 #define CSL_DSS_VP3_TIMING_V                                                   (0x00000058U)
 #define CSL_DSS_VP3_CSC_COEF3                                                  (0x0000005CU)
 #define CSL_DSS_VP3_CSC_COEF4                                                  (0x00000060U)
 #define CSL_DSS_VP3_CSC_COEF5                                                  (0x00000064U)
 #define CSL_DSS_VP3_CSC_COEF6                                                  (0x00000068U)
 #define CSL_DSS_VP3_CSC_COEF7                                                  (0x0000006CU)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES(index)                                   (0x00000070U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE(index)                               (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP3_SAFETY_POSITION(index)                                     (0x000000B0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP3_SAFETY_REF_SIGNATURE(index)                                (0x000000D0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP3_SAFETY_SIZE(index)                                         (0x000000F0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP3_SAFETY_LFSR_SEED                                           (0x00000110U)
 #define CSL_DSS_VP3_GAMMA_TABLE_0                                              (0x00000120U)
 #define CSL_DSS_VP3_GAMMA_TABLE_1                                              (0x00000124U)
 #define CSL_DSS_VP3_GAMMA_TABLE_2                                              (0x00000128U)
 #define CSL_DSS_VP3_GAMMA_TABLE_3                                              (0x0000012CU)
 #define CSL_DSS_VP3_GAMMA_TABLE_4                                              (0x00000130U)
 #define CSL_DSS_VP3_GAMMA_TABLE_5                                              (0x00000134U)
 #define CSL_DSS_VP3_GAMMA_TABLE_6                                              (0x00000138U)
 #define CSL_DSS_VP3_GAMMA_TABLE_7                                              (0x0000013CU)
 #define CSL_DSS_VP3_GAMMA_TABLE_8                                              (0x00000140U)
 #define CSL_DSS_VP3_GAMMA_TABLE_9                                              (0x00000144U)
 #define CSL_DSS_VP3_GAMMA_TABLE_10                                             (0x00000148U)
 #define CSL_DSS_VP3_GAMMA_TABLE_11                                             (0x0000014CU)
 #define CSL_DSS_VP3_GAMMA_TABLE_12                                             (0x00000150U)
 #define CSL_DSS_VP3_GAMMA_TABLE_13                                             (0x00000154U)
 #define CSL_DSS_VP3_GAMMA_TABLE_14                                             (0x00000158U)
 #define CSL_DSS_VP3_GAMMA_TABLE_15                                             (0x0000015CU)
 #define CSL_DSS_VP3_DSS_OLDI_CFG                                               (0x00000160U)
 #define CSL_DSS_VP3_DSS_OLDI_STATUS                                            (0x00000164U)
 #define CSL_DSS_VP3_DSS_OLDI_LB                                                (0x00000168U)
 #define CSL_DSS_VP3_SECURE                                                     (0x00000178U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_VP3_CONFIG_PIXELGATED_MASK                                     (0x00000001U)
 #define CSL_DSS_VP3_CONFIG_PIXELGATED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP3_CONFIG_PIXELGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGA                             (0x0U)
 #define CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGV                             (0x1U)

 #define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MASK                                (0x00000002U)
 #define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_SHIFT                               (0x00000001U)
 #define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGDIS                          (0x0U)
 #define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGENB                          (0x1U)

 #define CSL_DSS_VP3_CONFIG_GAMMAENABLE_MASK                                    (0x00000004U)
 #define CSL_DSS_VP3_CONFIG_GAMMAENABLE_SHIFT                                   (0x00000002U)
 #define CSL_DSS_VP3_CONFIG_GAMMAENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMADIS                            (0x0U)
 #define CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMAENB                            (0x1U)

 #define CSL_DSS_VP3_CONFIG_HDMIMODE_MASK                                       (0x00000008U)
 #define CSL_DSS_VP3_CONFIG_HDMIMODE_SHIFT                                      (0x00000003U)
 #define CSL_DSS_VP3_CONFIG_HDMIMODE_MAX                                        (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MASK                                 (0x00000010U)
 #define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_SHIFT                                (0x00000004U)
 #define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MAX                                  (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGDIS                           (0x0U)
 #define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGENB                           (0x1U)

 #define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MASK                                (0x00000020U)
 #define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_SHIFT                               (0x00000005U)
 #define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS                          (0x0U)
 #define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGENB                          (0x1U)

 #define CSL_DSS_VP3_CONFIG_HSYNCGATED_MASK                                     (0x00000040U)
 #define CSL_DSS_VP3_CONFIG_HSYNCGATED_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP3_CONFIG_HSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGDIS                                (0x0U)
 #define CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGENB                                (0x1U)

 #define CSL_DSS_VP3_CONFIG_VSYNCGATED_MASK                                     (0x00000080U)
 #define CSL_DSS_VP3_CONFIG_VSYNCGATED_SHIFT                                    (0x00000007U)
 #define CSL_DSS_VP3_CONFIG_VSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGDIS                                (0x0U)
 #define CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGENB                                (0x1U)

 #define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MASK                                 (0x00000100U)
 #define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_SHIFT                                (0x00000008U)
 #define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MAX                                  (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_RESERVED1_MASK                                      (0x00007E00U)
 #define CSL_DSS_VP3_CONFIG_RESERVED1_SHIFT                                     (0x00000009U)
 #define CSL_DSS_VP3_CONFIG_RESERVED1_MAX                                       (0x0000003FU)

 #define CSL_DSS_VP3_CONFIG_CPR_MASK                                            (0x00008000U)
 #define CSL_DSS_VP3_CONFIG_CPR_SHIFT                                           (0x0000000FU)
 #define CSL_DSS_VP3_CONFIG_CPR_MAX                                             (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MASK                                (0x00010000U)
 #define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_SHIFT                               (0x00000010U)
 #define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_RESERVED2_MASK                                      (0x000E0000U)
 #define CSL_DSS_VP3_CONFIG_RESERVED2_SHIFT                                     (0x00000011U)
 #define CSL_DSS_VP3_CONFIG_RESERVED2_MAX                                       (0x00000007U)

 #define CSL_DSS_VP3_CONFIG_BT656ENABLE_MASK                                    (0x00100000U)
 #define CSL_DSS_VP3_CONFIG_BT656ENABLE_SHIFT                                   (0x00000014U)
 #define CSL_DSS_VP3_CONFIG_BT656ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_DISABLE                             (0x0U)
 #define CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_ENABLE                              (0x1U)

 #define CSL_DSS_VP3_CONFIG_BT1120ENABLE_MASK                                   (0x00200000U)
 #define CSL_DSS_VP3_CONFIG_BT1120ENABLE_SHIFT                                  (0x00000015U)
 #define CSL_DSS_VP3_CONFIG_BT1120ENABLE_MAX                                    (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_DISABLE                            (0x0U)
 #define CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_ENABLE                             (0x1U)

 #define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MASK                               (0x00400000U)
 #define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_SHIFT                              (0x00000016U)
 #define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE                        (0x0U)
 #define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE                         (0x1U)

 #define CSL_DSS_VP3_CONFIG_FIDFIRST_MASK                                       (0x00800000U)
 #define CSL_DSS_VP3_CONFIG_FIDFIRST_SHIFT                                      (0x00000017U)
 #define CSL_DSS_VP3_CONFIG_FIDFIRST_MAX                                        (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_EVEN                                   (0x0U)
 #define CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_ODD                                    (0x1U)

 #define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MASK                                (0x01000000U)
 #define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_SHIFT                               (0x00000018U)
 #define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS                       (0x0U)
 #define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCENB                       (0x1U)

 #define CSL_DSS_VP3_CONFIG_FULLRANGE_MASK                                      (0x02000000U)
 #define CSL_DSS_VP3_CONFIG_FULLRANGE_SHIFT                                     (0x00000019U)
 #define CSL_DSS_VP3_CONFIG_FULLRANGE_MAX                                       (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_LIMRANGE                              (0x0U)
 #define CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_FULLRANGE                             (0x1U)

 #define CSL_DSS_VP3_CONFIG_COLORCONVPOS_MASK                                   (0x04000000U)
 #define CSL_DSS_VP3_CONFIG_COLORCONVPOS_SHIFT                                  (0x0000001AU)
 #define CSL_DSS_VP3_CONFIG_COLORCONVPOS_MAX                                    (0x00000001U)

 #define CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA                         (0x0U)
 #define CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA                        (0x1U)

 #define CSL_DSS_VP3_CONFIG_RESERVED3_MASK                                      (0xF8000000U)
 #define CSL_DSS_VP3_CONFIG_RESERVED3_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP3_CONFIG_RESERVED3_MAX                                       (0x0000001FU)

 /* CONTROL */

 #define CSL_DSS_VP3_CONTROL_ENABLE_MASK                                        (0x00000001U)
 #define CSL_DSS_VP3_CONTROL_ENABLE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VP3_CONTROL_ENABLE_MAX                                         (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPDIS                                (0x0U)
 #define CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPENB                                (0x1U)

 #define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MASK                        (0x00000002U)
 #define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_SHIFT                       (0x00000001U)
 #define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MAX                         (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS                  (0x0U)
 #define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN                   (0x1U)

 #define CSL_DSS_VP3_CONTROL_MONOCOLOR_MASK                                     (0x00000004U)
 #define CSL_DSS_VP3_CONTROL_MONOCOLOR_SHIFT                                    (0x00000002U)
 #define CSL_DSS_VP3_CONTROL_MONOCOLOR_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_STN_MASK                                           (0x00000008U)
 #define CSL_DSS_VP3_CONTROL_STN_SHIFT                                          (0x00000003U)
 #define CSL_DSS_VP3_CONTROL_STN_MAX                                            (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_M8B_MASK                                           (0x00000010U)
 #define CSL_DSS_VP3_CONTROL_M8B_SHIFT                                          (0x00000004U)
 #define CSL_DSS_VP3_CONTROL_M8B_MAX                                            (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_GOBIT_MASK                                         (0x00000020U)
 #define CSL_DSS_VP3_CONTROL_GOBIT_SHIFT                                        (0x00000005U)
 #define CSL_DSS_VP3_CONTROL_GOBIT_MAX                                          (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_GOBIT_VAL_HFUISR                                   (0x0U)
 #define CSL_DSS_VP3_CONTROL_GOBIT_VAL_UFPSR                                    (0x1U)

 #define CSL_DSS_VP3_CONTROL_DPIENABLE_MASK                                     (0x00000040U)
 #define CSL_DSS_VP3_CONTROL_DPIENABLE_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP3_CONTROL_DPIENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPDIS                             (0x0U)
 #define CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPENB                             (0x1U)

 #define CSL_DSS_VP3_CONTROL_STDITHERENABLE_MASK                                (0x00000080U)
 #define CSL_DSS_VP3_CONTROL_STDITHERENABLE_SHIFT                               (0x00000007U)
 #define CSL_DSS_VP3_CONTROL_STDITHERENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHDIS                       (0x0U)
 #define CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHENB                       (0x1U)

 #define CSL_DSS_VP3_CONTROL_DATALINES_MASK                                     (0x00000700U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_SHIFT                                    (0x00000008U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_MAX                                      (0x00000007U)

 #define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB12B                             (0x0U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB16B                             (0x1U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB18B                             (0x2U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB24B                             (0x3U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB30B                             (0x4U)
 #define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB36B                             (0x5U)

 #define CSL_DSS_VP3_CONTROL_STALLMODE_MASK                                     (0x00000800U)
 #define CSL_DSS_VP3_CONTROL_STALLMODE_SHIFT                                    (0x0000000BU)
 #define CSL_DSS_VP3_CONTROL_STALLMODE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLDIS                             (0x0U)
 #define CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLENB                             (0x1U)

 #define CSL_DSS_VP3_CONTROL_STALLMODETYPE_MASK                                 (0x00001000U)
 #define CSL_DSS_VP3_CONTROL_STALLMODETYPE_SHIFT                                (0x0000000CU)
 #define CSL_DSS_VP3_CONTROL_STALLMODETYPE_MAX                                  (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_COMMANDMODE                      (0x0U)
 #define CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_VIDEOMODE                        (0x1U)

 #define CSL_DSS_VP3_CONTROL_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_VP3_CONTROL_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_VP3_CONTROL_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_HT_MASK                                            (0x0001C000U)
 #define CSL_DSS_VP3_CONTROL_HT_SHIFT                                           (0x0000000EU)
 #define CSL_DSS_VP3_CONTROL_HT_MAX                                             (0x00000007U)

 #define CSL_DSS_VP3_CONTROL_RESERVED1_MASK                                     (0x000E0000U)
 #define CSL_DSS_VP3_CONTROL_RESERVED1_SHIFT                                    (0x00000011U)
 #define CSL_DSS_VP3_CONTROL_RESERVED1_MAX                                      (0x00000007U)

 #define CSL_DSS_VP3_CONTROL_TDMENABLE_MASK                                     (0x00100000U)
 #define CSL_DSS_VP3_CONTROL_TDMENABLE_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VP3_CONTROL_TDMENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMDIS                               (0x0U)
 #define CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMENB                               (0x1U)

 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MASK                               (0x00600000U)
 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MAX                                (0x00000003U)

 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT                      (0x0U)
 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT                      (0x1U)
 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT                     (0x2U)
 #define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT                     (0x3U)

 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MASK                                (0x01800000U)
 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_SHIFT                               (0x00000017U)
 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MAX                                 (0x00000003U)

 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX                      (0x0U)
 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX                      (0x1U)
 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX                      (0x2U)
 #define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX                     (0x3U)

 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MASK                                 (0x06000000U)
 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_SHIFT                                (0x00000019U)
 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MAX                                  (0x00000003U)

 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL                         (0x0U)
 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL                        (0x1U)
 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED                        (0x2U)
 #define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_RES                              (0x3U)

 #define CSL_DSS_VP3_CONTROL_RESERVED_MASK                                      (0x38000000U)
 #define CSL_DSS_VP3_CONTROL_RESERVED_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP3_CONTROL_RESERVED_MAX                                       (0x00000007U)

 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK                (0xC0000000U)
 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT               (0x0000001EU)
 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX                 (0x00000003U)

 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME        (0x0U)
 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES       (0x1U)
 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES      (0x2U)
 #define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED        (0x3U)

 /* CSC_COEF0 */

 #define CSL_DSS_VP3_CSC_COEF0_C00_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP3_CSC_COEF0_C00_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF0_C00_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP3_CSC_COEF0_C01_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP3_CSC_COEF0_C01_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF0_C01_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MAX                                  (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VP3_CSC_COEF1_C02_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP3_CSC_COEF1_C02_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF1_C02_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP3_CSC_COEF1_C10_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP3_CSC_COEF1_C10_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF1_C10_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MAX                                  (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VP3_CSC_COEF2_C11_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP3_CSC_COEF2_C11_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF2_C11_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP3_CSC_COEF2_C12_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP3_CSC_COEF2_C12_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF2_C12_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MAX                                  (0x0000001FU)

 /* DATA_CYCLE_0 */

 #define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_1 */

 #define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_2 */

 #define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MAX                                (0x0000000FU)

 /* LINE_NUMBER */

 #define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP3_LINE_NUMBER_RESERVED_MASK                                  (0xFFFFC000U)
 #define CSL_DSS_VP3_LINE_NUMBER_RESERVED_SHIFT                                 (0x0000000EU)
 #define CSL_DSS_VP3_LINE_NUMBER_RESERVED_MAX                                   (0x0003FFFFU)

 /* POL_FREQ */

 #define CSL_DSS_VP3_POL_FREQ_ACB_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP3_POL_FREQ_ACB_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP3_POL_FREQ_ACB_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP3_POL_FREQ_ACBI_MASK                                         (0x00000F00U)
 #define CSL_DSS_VP3_POL_FREQ_ACBI_SHIFT                                        (0x00000008U)
 #define CSL_DSS_VP3_POL_FREQ_ACBI_MAX                                          (0x0000000FU)

 #define CSL_DSS_VP3_POL_FREQ_IVS_MASK                                          (0x00001000U)
 #define CSL_DSS_VP3_POL_FREQ_IVS_SHIFT                                         (0x0000000CU)
 #define CSL_DSS_VP3_POL_FREQ_IVS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAH                                  (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAL                                  (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_IHS_MASK                                          (0x00002000U)
 #define CSL_DSS_VP3_POL_FREQ_IHS_SHIFT                                         (0x0000000DU)
 #define CSL_DSS_VP3_POL_FREQ_IHS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAH                                  (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAL                                  (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_IPC_MASK                                          (0x00004000U)
 #define CSL_DSS_VP3_POL_FREQ_IPC_SHIFT                                         (0x0000000EU)
 #define CSL_DSS_VP3_POL_FREQ_IPC_MAX                                           (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_IPC_VAL_DRPCK                                     (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_IPC_VAL_DFPCK                                     (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_IEO_MASK                                          (0x00008000U)
 #define CSL_DSS_VP3_POL_FREQ_IEO_SHIFT                                         (0x0000000FU)
 #define CSL_DSS_VP3_POL_FREQ_IEO_MAX                                           (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBAHIGH                                  (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBALOW                                   (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_RF_MASK                                           (0x00010000U)
 #define CSL_DSS_VP3_POL_FREQ_RF_SHIFT                                          (0x00000010U)
 #define CSL_DSS_VP3_POL_FREQ_RF_MAX                                            (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_RF_VAL_DFEDPCK                                    (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_RF_VAL_DRIEDPCK                                   (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_ONOFF_MASK                                        (0x00020000U)
 #define CSL_DSS_VP3_POL_FREQ_ONOFF_SHIFT                                       (0x00000011U)
 #define CSL_DSS_VP3_POL_FREQ_ONOFF_MAX                                         (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DOPEDPCK                                (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DBIT16                                  (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_ALIGN_MASK                                        (0x00040000U)
 #define CSL_DSS_VP3_POL_FREQ_ALIGN_SHIFT                                       (0x00000012U)
 #define CSL_DSS_VP3_POL_FREQ_ALIGN_MAX                                         (0x00000001U)

 #define CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_NOTALIGNED                              (0x0U)
 #define CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_ALIGNED                                 (0x1U)

 #define CSL_DSS_VP3_POL_FREQ_RESERVED_MASK                                     (0xFFF80000U)
 #define CSL_DSS_VP3_POL_FREQ_RESERVED_SHIFT                                    (0x00000013U)
 #define CSL_DSS_VP3_POL_FREQ_RESERVED_MAX                                      (0x00001FFFU)

 /* SIZE_SCREEN */

 #define CSL_DSS_VP3_SIZE_SCREEN_PPL_MASK                                       (0x00003FFFU)
 #define CSL_DSS_VP3_SIZE_SCREEN_PPL_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VP3_SIZE_SCREEN_PPL_MAX                                        (0x00003FFFU)

 #define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MASK                                 (0x0000C000U)
 #define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MAX                                  (0x00000003U)

 #define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_SAME                             (0x0U)
 #define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE                          (0x1U)
 #define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE                         (0x2U)

 #define CSL_DSS_VP3_SIZE_SCREEN_LPP_MASK                                       (0x3FFF0000U)
 #define CSL_DSS_VP3_SIZE_SCREEN_LPP_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VP3_SIZE_SCREEN_LPP_MAX                                        (0x00003FFFU)

 /* TIMING_H */

 #define CSL_DSS_VP3_TIMING_H_HSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP3_TIMING_H_HSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP3_TIMING_H_HSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP3_TIMING_H_HFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP3_TIMING_H_HFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP3_TIMING_H_HFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP3_TIMING_H_HBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP3_TIMING_H_HBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP3_TIMING_H_HBP_MAX                                           (0x00000FFFU)

 /* TIMING_V */

 #define CSL_DSS_VP3_TIMING_V_VSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP3_TIMING_V_VSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP3_TIMING_V_VSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP3_TIMING_V_VFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP3_TIMING_V_VFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP3_TIMING_V_VFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP3_TIMING_V_VBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP3_TIMING_V_VBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP3_TIMING_V_VBP_MAX                                           (0x00000FFFU)

 /* CSC_COEF3 */

 #define CSL_DSS_VP3_CSC_COEF3_C20_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP3_CSC_COEF3_C20_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF3_C20_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP3_CSC_COEF3_C21_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP3_CSC_COEF3_C21_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF3_C21_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MAX                                  (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VP3_CSC_COEF4_C22_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP3_CSC_COEF4_C22_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF4_C22_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MASK                                 (0xFFFFF800U)
 #define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MAX                                  (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VP3_CSC_COEF5_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP3_CSC_COEF5_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF5_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP3_CSC_COEF5_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP3_CSC_COEF5_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF5_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MASK                                  (0xFFF80000U)
 #define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_SHIFT                                 (0x00000013U)
 #define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MAX                                   (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VP3_CSC_COEF6_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP3_CSC_COEF6_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF6_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP3_CSC_COEF6_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP3_CSC_COEF6_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF6_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MAX                                  (0x00001FFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VP3_CSC_COEF7_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP3_CSC_COEF7_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP3_CSC_COEF7_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_SHIFT                                (0x00000003U)
 #define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VP3_CSC_COEF7_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP3_CSC_COEF7_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP3_CSC_COEF7_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MAX                                  (0x00001FFFU)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MASK                              (0x00000001U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MAX                               (0x00000001U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                         (0x00000002U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                        (0x00000001U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                          (0x00000001U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE              (0x0U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK                (0x1U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                          (0x00000004U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                         (0x00000002U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                           (0x00000001U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                   (0x0U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                    (0x1U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MASK                           (0x000007F8U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                          (0x00000003U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MAX                            (0x000000FFU)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                           (0x00001800U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                          (0x0000000BU)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                            (0x00000003U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP                     (0x0U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                       (0x1U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                        (0x2U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                   (0x3U)

 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MASK                            (0xFFFFE000U)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_SHIFT                           (0x0000000DU)
 #define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MAX                             (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                       (0xFFFFFFFFU)
 #define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                      (0x00000000U)
 #define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                        (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VP3_SAFETY_POSITION_POSX_MASK                                  (0x00003FFFU)
 #define CSL_DSS_VP3_SAFETY_POSITION_POSX_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP3_SAFETY_POSITION_POSX_MAX                                   (0x00003FFFU)

 #define CSL_DSS_VP3_SAFETY_POSITION_POSY_MASK                                  (0x3FFF0000U)
 #define CSL_DSS_VP3_SAFETY_POSITION_POSY_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VP3_SAFETY_POSITION_POSY_MAX                                   (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                       (0x00000000U)
 #define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                         (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MAX                                      (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MASK                                 (0xFFFFFFFFU)
 #define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MAX                                  (0xFFFFFFFFU)

 /* GAMMA_TABLE_0 */

 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_1 */

 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_2 */

 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_3 */

 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_4 */

 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_5 */

 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_6 */

 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_7 */

 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_8 */

 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_9 */

 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_10 */

 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_11 */

 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_12 */

 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_13 */

 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_14 */

 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_15 */

 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MAX                                   (0x00000001U)

 /* DSS_OLDI_CFG */

 #define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MASK                                 (0xFFFFC000U)
 #define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MAX                                  (0x0003FFFFU)

 /* DSS_OLDI_STATUS */

 #define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MASK                              (0xFFFFFFFFU)
 #define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MAX                               (0xFFFFFFFFU)

 /* DSS_OLDI_LB */

 #define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MASK                                  (0xFFFFFFFFU)
 #define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MAX                                   (0xFFFFFFFFU)

 /* SECURE */

 #define CSL_DSS_VP3_SECURE_SECURE_MASK                                         (0x00000001U)
 #define CSL_DSS_VP3_SECURE_SECURE_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP3_SECURE_SECURE_MAX                                          (0x00000001U)

 #define CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREDIS                                (0x0U)
 #define CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREEN                                 (0x1U)

 #define CSL_DSS_VP3_SECURE_RESERVED_MASK                                       (0xFFFFFFFEU)
 #define CSL_DSS_VP3_SECURE_RESERVED_SHIFT                                      (0x00000001U)
 #define CSL_DSS_VP3_SECURE_RESERVED_MAX                                        (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : OVR4 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t VIRTUALVP;                 /* VIRTUALVP */
     volatile uint32_t DEFAULT_COLOR;             /* DEFAULT_COLOR */
     volatile uint32_t DEFAULT_COLOR2;            /* DEFAULT_COLOR2 */
     volatile uint32_t TRANS_COLOR_MAX;           /* TRANS_COLOR_MAX */
     volatile uint32_t TRANS_COLOR_MAX2;          /* TRANS_COLOR_MAX2 */
     volatile uint32_t TRANS_COLOR_MIN;           /* TRANS_COLOR_MIN */
     volatile uint32_t TRANS_COLOR_MIN2;          /* TRANS_COLOR_MIN2 */
     volatile uint32_t ATTRIBUTES[5U];            /* ATTRIBUTES 0..4 */
     volatile uint32_t ATTRIBUTES2[5U];           /* ATTRIBUTES2 0..4 */
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_ovr4Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_OVR4_CONFIG                                                    (0x00000000U)
 #define CSL_DSS_OVR4_VIRTUALVP                                                 (0x00000004U)
 #define CSL_DSS_OVR4_DEFAULT_COLOR                                             (0x00000008U)
 #define CSL_DSS_OVR4_DEFAULT_COLOR2                                            (0x0000000CU)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX                                           (0x00000010U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2                                          (0x00000014U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN                                           (0x00000018U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2                                          (0x0000001CU)
 #define CSL_DSS_OVR4_ATTRIBUTES(index)                                         (0x00000020U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR4_ATTRIBUTES2(index)                                        (0x00000034U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_OVR4_SECURE                                                    (0x00000048U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_OVR4_CONFIG_RESERVED6_MASK                                     (0x00000001U)
 #define CSL_DSS_OVR4_CONFIG_RESERVED6_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR4_CONFIG_RESERVED6_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR4_CONFIG_COLORBAREN_MASK                                    (0x00000002U)
 #define CSL_DSS_OVR4_CONFIG_COLORBAREN_SHIFT                                   (0x00000001U)
 #define CSL_DSS_OVR4_CONFIG_COLORBAREN_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBARDIS                         (0x0U)
 #define CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBAREN                          (0x1U)

 #define CSL_DSS_OVR4_CONFIG_RESERVED_MASK                                      (0x000003FCU)
 #define CSL_DSS_OVR4_CONFIG_RESERVED_SHIFT                                     (0x00000002U)
 #define CSL_DSS_OVR4_CONFIG_RESERVED_MAX                                       (0x000000FFU)

 #define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MASK                                  (0x00000400U)
 #define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MAX                                   (0x00000001U)

 #define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_DISTCK                            (0x0U)
 #define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_ENBTCK                            (0x1U)

 #define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MASK                               (0x00000800U)
 #define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_SHIFT                              (0x0000000BU)
 #define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MAX                                (0x00000001U)

 #define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_GDTK                           (0x0U)
 #define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_VSTK                           (0x1U)

 #define CSL_DSS_OVR4_CONFIG_RESERVED2_MASK                                     (0x00001000U)
 #define CSL_DSS_OVR4_CONFIG_RESERVED2_SHIFT                                    (0x0000000CU)
 #define CSL_DSS_OVR4_CONFIG_RESERVED2_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR4_CONFIG_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_OVR4_CONFIG_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_OVR4_CONFIG_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_OVR4_CONFIG_RESERVED1_MASK                                     (0xFFFFC000U)
 #define CSL_DSS_OVR4_CONFIG_RESERVED1_SHIFT                                    (0x0000000EU)
 #define CSL_DSS_OVR4_CONFIG_RESERVED1_MAX                                      (0x0003FFFFU)

 /* VIRTUALVP */

 #define CSL_DSS_OVR4_VIRTUALVP_PPL_MASK                                        (0x00003FFFU)
 #define CSL_DSS_OVR4_VIRTUALVP_PPL_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR4_VIRTUALVP_PPL_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR4_VIRTUALVP_LPP_MASK                                        (0x3FFF0000U)
 #define CSL_DSS_OVR4_VIRTUALVP_LPP_SHIFT                                       (0x00000010U)
 #define CSL_DSS_OVR4_VIRTUALVP_LPP_MAX                                         (0x00003FFFU)

 #define CSL_DSS_OVR4_VIRTUALVP_ENABLE_MASK                                     (0x80000000U)
 #define CSL_DSS_OVR4_VIRTUALVP_ENABLE_SHIFT                                    (0x0000001FU)
 #define CSL_DSS_OVR4_VIRTUALVP_ENABLE_MAX                                      (0x00000001U)

 /* DEFAULT_COLOR */

 #define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MASK                           (0xFFFFFFFFU)
 #define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT                          (0x00000000U)
 #define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MAX                            (0xFFFFFFFFU)

 /* DEFAULT_COLOR2 */

 #define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MASK                          (0x0000FFFFU)
 #define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT                         (0x00000000U)
 #define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MAX                           (0x0000FFFFU)

 #define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MASK                              (0xFFFF0000U)
 #define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_SHIFT                             (0x00000010U)
 #define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MAX                               (0x0000FFFFU)

 /* TRANS_COLOR_MAX */

 #define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MAX2 */

 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* TRANS_COLOR_MIN */

 #define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT                       (0x00000000U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX                         (0xFFFFFFFFU)

 /* TRANS_COLOR_MIN2 */

 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK                       (0x0000000FU)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT                      (0x00000000U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX                        (0x0000000FU)

 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MASK                            (0xFFFFFFF0U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_SHIFT                           (0x00000004U)
 #define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MAX                             (0x0FFFFFFFU)

 /* ATTRIBUTES */

 #define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MASK                                    (0x00000001U)
 #define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_SHIFT                                   (0x00000000U)
 #define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MASK                                 (0x0000001EU)
 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_SHIFT                                (0x00000001U)
 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MAX                                  (0x0000000FU)

 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID1                             (0x0U)
 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL1                            (0x1U)
 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID2                             (0x2U)
 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL2                            (0x3U)
 #define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIRTCH                           (0x4U)

 /* ATTRIBUTES2 */

 #define CSL_DSS_OVR4_ATTRIBUTES2_POSX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_OVR4_ATTRIBUTES2_POSX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_OVR4_ATTRIBUTES2_POSX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_OVR4_ATTRIBUTES2_POSY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_OVR4_ATTRIBUTES2_POSY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_OVR4_ATTRIBUTES2_POSY_MAX                                      (0x00003FFFU)

 /* SECURE */

 #define CSL_DSS_OVR4_SECURE_SECURE_MASK                                        (0x00000001U)
 #define CSL_DSS_OVR4_SECURE_SECURE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_OVR4_SECURE_SECURE_MAX                                         (0x00000001U)

 #define CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREDIS                               (0x0U)
 #define CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREEN                                (0x1U)

 #define CSL_DSS_OVR4_SECURE_RESERVED_MASK                                      (0xFFFFFFFEU)
 #define CSL_DSS_OVR4_SECURE_RESERVED_SHIFT                                     (0x00000001U)
 #define CSL_DSS_OVR4_SECURE_RESERVED_MAX                                       (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : VP4 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t CONFIG;                    /* CONFIG */
     volatile uint32_t CONTROL;                   /* CONTROL */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t DATA_CYCLE_0;              /* DATA_CYCLE_0 */
     volatile uint32_t DATA_CYCLE_1;              /* DATA_CYCLE_1 */
     volatile uint32_t DATA_CYCLE_2;              /* DATA_CYCLE_2 */
     volatile uint8_t  Resv_68[36];
     volatile uint32_t LINE_NUMBER;               /* LINE_NUMBER */
     volatile uint8_t  Resv_76[4];
     volatile uint32_t POL_FREQ;                  /* POL_FREQ */
     volatile uint32_t SIZE_SCREEN;               /* SIZE_SCREEN */
     volatile uint32_t TIMING_H;                  /* TIMING_H */
     volatile uint32_t TIMING_V;                  /* TIMING_V */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint32_t SAFETY_ATTRIBUTES[8U];     /* SAFETY_ATTRIBUTES 0..7 */
     volatile uint32_t SAFETY_CAPT_SIGNATURE[8U]; /* SAFETY_CAPT_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_POSITION[8U];       /* SAFETY_POSITION 0..7 */
     volatile uint32_t SAFETY_REF_SIGNATURE[8U];  /* SAFETY_REF_SIGNATURE 0..7 */
     volatile uint32_t SAFETY_SIZE[8U];           /* SAFETY_SIZE 0..7 */
     volatile uint32_t SAFETY_LFSR_SEED;          /* SAFETY_LFSR_SEED */
     volatile uint8_t  Resv_288[12];
     volatile uint32_t GAMMA_TABLE_0;             /* GAMMA_TABLE_0 */
     volatile uint32_t GAMMA_TABLE_1;             /* GAMMA_TABLE_1 */
     volatile uint32_t GAMMA_TABLE_2;             /* GAMMA_TABLE_2 */
     volatile uint32_t GAMMA_TABLE_3;             /* GAMMA_TABLE_3 */
     volatile uint32_t GAMMA_TABLE_4;             /* GAMMA_TABLE_4 */
     volatile uint32_t GAMMA_TABLE_5;             /* GAMMA_TABLE_5 */
     volatile uint32_t GAMMA_TABLE_6;             /* GAMMA_TABLE_6 */
     volatile uint32_t GAMMA_TABLE_7;             /* GAMMA_TABLE_7 */
     volatile uint32_t GAMMA_TABLE_8;             /* GAMMA_TABLE_8 */
     volatile uint32_t GAMMA_TABLE_9;             /* GAMMA_TABLE_9 */
     volatile uint32_t GAMMA_TABLE_10;            /* GAMMA_TABLE_10 */
     volatile uint32_t GAMMA_TABLE_11;            /* GAMMA_TABLE_11 */
     volatile uint32_t GAMMA_TABLE_12;            /* GAMMA_TABLE_12 */
     volatile uint32_t GAMMA_TABLE_13;            /* GAMMA_TABLE_13 */
     volatile uint32_t GAMMA_TABLE_14;            /* GAMMA_TABLE_14 */
     volatile uint32_t GAMMA_TABLE_15;            /* GAMMA_TABLE_15 */
     volatile uint32_t DSS_OLDI_CFG;              /* DSS_OLDI_CFG */
     volatile uint32_t DSS_OLDI_STATUS;           /* DSS_OLDI_STATUS */
     volatile uint32_t DSS_OLDI_LB;               /* DSS_OLDI_LB */
     volatile uint8_t  Resv_376[12];
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_vp4Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_VP4_CONFIG                                                     (0x00000000U)
 #define CSL_DSS_VP4_CONTROL                                                    (0x00000004U)
 #define CSL_DSS_VP4_CSC_COEF0                                                  (0x00000008U)
 #define CSL_DSS_VP4_CSC_COEF1                                                  (0x0000000CU)
 #define CSL_DSS_VP4_CSC_COEF2                                                  (0x00000010U)
 #define CSL_DSS_VP4_DATA_CYCLE_0                                               (0x00000014U)
 #define CSL_DSS_VP4_DATA_CYCLE_1                                               (0x00000018U)
 #define CSL_DSS_VP4_DATA_CYCLE_2                                               (0x0000001CU)
 #define CSL_DSS_VP4_LINE_NUMBER                                                (0x00000044U)
 #define CSL_DSS_VP4_POL_FREQ                                                   (0x0000004CU)
 #define CSL_DSS_VP4_SIZE_SCREEN                                                (0x00000050U)
 #define CSL_DSS_VP4_TIMING_H                                                   (0x00000054U)
 #define CSL_DSS_VP4_TIMING_V                                                   (0x00000058U)
 #define CSL_DSS_VP4_CSC_COEF3                                                  (0x0000005CU)
 #define CSL_DSS_VP4_CSC_COEF4                                                  (0x00000060U)
 #define CSL_DSS_VP4_CSC_COEF5                                                  (0x00000064U)
 #define CSL_DSS_VP4_CSC_COEF6                                                  (0x00000068U)
 #define CSL_DSS_VP4_CSC_COEF7                                                  (0x0000006CU)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES(index)                                   (0x00000070U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE(index)                               (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP4_SAFETY_POSITION(index)                                     (0x000000B0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP4_SAFETY_REF_SIGNATURE(index)                                (0x000000D0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP4_SAFETY_SIZE(index)                                         (0x000000F0U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_VP4_SAFETY_LFSR_SEED                                           (0x00000110U)
 #define CSL_DSS_VP4_GAMMA_TABLE_0                                              (0x00000120U)
 #define CSL_DSS_VP4_GAMMA_TABLE_1                                              (0x00000124U)
 #define CSL_DSS_VP4_GAMMA_TABLE_2                                              (0x00000128U)
 #define CSL_DSS_VP4_GAMMA_TABLE_3                                              (0x0000012CU)
 #define CSL_DSS_VP4_GAMMA_TABLE_4                                              (0x00000130U)
 #define CSL_DSS_VP4_GAMMA_TABLE_5                                              (0x00000134U)
 #define CSL_DSS_VP4_GAMMA_TABLE_6                                              (0x00000138U)
 #define CSL_DSS_VP4_GAMMA_TABLE_7                                              (0x0000013CU)
 #define CSL_DSS_VP4_GAMMA_TABLE_8                                              (0x00000140U)
 #define CSL_DSS_VP4_GAMMA_TABLE_9                                              (0x00000144U)
 #define CSL_DSS_VP4_GAMMA_TABLE_10                                             (0x00000148U)
 #define CSL_DSS_VP4_GAMMA_TABLE_11                                             (0x0000014CU)
 #define CSL_DSS_VP4_GAMMA_TABLE_12                                             (0x00000150U)
 #define CSL_DSS_VP4_GAMMA_TABLE_13                                             (0x00000154U)
 #define CSL_DSS_VP4_GAMMA_TABLE_14                                             (0x00000158U)
 #define CSL_DSS_VP4_GAMMA_TABLE_15                                             (0x0000015CU)
 #define CSL_DSS_VP4_DSS_OLDI_CFG                                               (0x00000160U)
 #define CSL_DSS_VP4_DSS_OLDI_STATUS                                            (0x00000164U)
 #define CSL_DSS_VP4_DSS_OLDI_LB                                                (0x00000168U)
 #define CSL_DSS_VP4_SECURE                                                     (0x00000178U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* CONFIG */

 #define CSL_DSS_VP4_CONFIG_PIXELGATED_MASK                                     (0x00000001U)
 #define CSL_DSS_VP4_CONFIG_PIXELGATED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP4_CONFIG_PIXELGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGA                             (0x0U)
 #define CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGV                             (0x1U)

 #define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MASK                                (0x00000002U)
 #define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_SHIFT                               (0x00000001U)
 #define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGDIS                          (0x0U)
 #define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGENB                          (0x1U)

 #define CSL_DSS_VP4_CONFIG_GAMMAENABLE_MASK                                    (0x00000004U)
 #define CSL_DSS_VP4_CONFIG_GAMMAENABLE_SHIFT                                   (0x00000002U)
 #define CSL_DSS_VP4_CONFIG_GAMMAENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMADIS                            (0x0U)
 #define CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMAENB                            (0x1U)

 #define CSL_DSS_VP4_CONFIG_HDMIMODE_MASK                                       (0x00000008U)
 #define CSL_DSS_VP4_CONFIG_HDMIMODE_SHIFT                                      (0x00000003U)
 #define CSL_DSS_VP4_CONFIG_HDMIMODE_MAX                                        (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MASK                                 (0x00000010U)
 #define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_SHIFT                                (0x00000004U)
 #define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MAX                                  (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGDIS                           (0x0U)
 #define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGENB                           (0x1U)

 #define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MASK                                (0x00000020U)
 #define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_SHIFT                               (0x00000005U)
 #define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MAX                                 (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS                          (0x0U)
 #define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGENB                          (0x1U)

 #define CSL_DSS_VP4_CONFIG_HSYNCGATED_MASK                                     (0x00000040U)
 #define CSL_DSS_VP4_CONFIG_HSYNCGATED_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP4_CONFIG_HSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGDIS                                (0x0U)
 #define CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGENB                                (0x1U)

 #define CSL_DSS_VP4_CONFIG_VSYNCGATED_MASK                                     (0x00000080U)
 #define CSL_DSS_VP4_CONFIG_VSYNCGATED_SHIFT                                    (0x00000007U)
 #define CSL_DSS_VP4_CONFIG_VSYNCGATED_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGDIS                                (0x0U)
 #define CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGENB                                (0x1U)

 #define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MASK                                 (0x00000100U)
 #define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_SHIFT                                (0x00000008U)
 #define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MAX                                  (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_RESERVED1_MASK                                      (0x00007E00U)
 #define CSL_DSS_VP4_CONFIG_RESERVED1_SHIFT                                     (0x00000009U)
 #define CSL_DSS_VP4_CONFIG_RESERVED1_MAX                                       (0x0000003FU)

 #define CSL_DSS_VP4_CONFIG_CPR_MASK                                            (0x00008000U)
 #define CSL_DSS_VP4_CONFIG_CPR_SHIFT                                           (0x0000000FU)
 #define CSL_DSS_VP4_CONFIG_CPR_MAX                                             (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MASK                                (0x00010000U)
 #define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_SHIFT                               (0x00000010U)
 #define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_RESERVED2_MASK                                      (0x000E0000U)
 #define CSL_DSS_VP4_CONFIG_RESERVED2_SHIFT                                     (0x00000011U)
 #define CSL_DSS_VP4_CONFIG_RESERVED2_MAX                                       (0x00000007U)

 #define CSL_DSS_VP4_CONFIG_BT656ENABLE_MASK                                    (0x00100000U)
 #define CSL_DSS_VP4_CONFIG_BT656ENABLE_SHIFT                                   (0x00000014U)
 #define CSL_DSS_VP4_CONFIG_BT656ENABLE_MAX                                     (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_DISABLE                             (0x0U)
 #define CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_ENABLE                              (0x1U)

 #define CSL_DSS_VP4_CONFIG_BT1120ENABLE_MASK                                   (0x00200000U)
 #define CSL_DSS_VP4_CONFIG_BT1120ENABLE_SHIFT                                  (0x00000015U)
 #define CSL_DSS_VP4_CONFIG_BT1120ENABLE_MAX                                    (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_DISABLE                            (0x0U)
 #define CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_ENABLE                             (0x1U)

 #define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MASK                               (0x00400000U)
 #define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_SHIFT                              (0x00000016U)
 #define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MAX                                (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE                        (0x0U)
 #define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE                         (0x1U)

 #define CSL_DSS_VP4_CONFIG_FIDFIRST_MASK                                       (0x00800000U)
 #define CSL_DSS_VP4_CONFIG_FIDFIRST_SHIFT                                      (0x00000017U)
 #define CSL_DSS_VP4_CONFIG_FIDFIRST_MAX                                        (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_EVEN                                   (0x0U)
 #define CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_ODD                                    (0x1U)

 #define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MASK                                (0x01000000U)
 #define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_SHIFT                               (0x00000018U)
 #define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS                       (0x0U)
 #define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCENB                       (0x1U)

 #define CSL_DSS_VP4_CONFIG_FULLRANGE_MASK                                      (0x02000000U)
 #define CSL_DSS_VP4_CONFIG_FULLRANGE_SHIFT                                     (0x00000019U)
 #define CSL_DSS_VP4_CONFIG_FULLRANGE_MAX                                       (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_LIMRANGE                              (0x0U)
 #define CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_FULLRANGE                             (0x1U)

 #define CSL_DSS_VP4_CONFIG_COLORCONVPOS_MASK                                   (0x04000000U)
 #define CSL_DSS_VP4_CONFIG_COLORCONVPOS_SHIFT                                  (0x0000001AU)
 #define CSL_DSS_VP4_CONFIG_COLORCONVPOS_MAX                                    (0x00000001U)

 #define CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA                         (0x0U)
 #define CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA                        (0x1U)

 #define CSL_DSS_VP4_CONFIG_RESERVED3_MASK                                      (0xF8000000U)
 #define CSL_DSS_VP4_CONFIG_RESERVED3_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP4_CONFIG_RESERVED3_MAX                                       (0x0000001FU)

 /* CONTROL */

 #define CSL_DSS_VP4_CONTROL_ENABLE_MASK                                        (0x00000001U)
 #define CSL_DSS_VP4_CONTROL_ENABLE_SHIFT                                       (0x00000000U)
 #define CSL_DSS_VP4_CONTROL_ENABLE_MAX                                         (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPDIS                                (0x0U)
 #define CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPENB                                (0x1U)

 #define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MASK                        (0x00000002U)
 #define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_SHIFT                       (0x00000001U)
 #define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MAX                         (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS                  (0x0U)
 #define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN                   (0x1U)

 #define CSL_DSS_VP4_CONTROL_MONOCOLOR_MASK                                     (0x00000004U)
 #define CSL_DSS_VP4_CONTROL_MONOCOLOR_SHIFT                                    (0x00000002U)
 #define CSL_DSS_VP4_CONTROL_MONOCOLOR_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_STN_MASK                                           (0x00000008U)
 #define CSL_DSS_VP4_CONTROL_STN_SHIFT                                          (0x00000003U)
 #define CSL_DSS_VP4_CONTROL_STN_MAX                                            (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_M8B_MASK                                           (0x00000010U)
 #define CSL_DSS_VP4_CONTROL_M8B_SHIFT                                          (0x00000004U)
 #define CSL_DSS_VP4_CONTROL_M8B_MAX                                            (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_GOBIT_MASK                                         (0x00000020U)
 #define CSL_DSS_VP4_CONTROL_GOBIT_SHIFT                                        (0x00000005U)
 #define CSL_DSS_VP4_CONTROL_GOBIT_MAX                                          (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_GOBIT_VAL_HFUISR                                   (0x0U)
 #define CSL_DSS_VP4_CONTROL_GOBIT_VAL_UFPSR                                    (0x1U)

 #define CSL_DSS_VP4_CONTROL_DPIENABLE_MASK                                     (0x00000040U)
 #define CSL_DSS_VP4_CONTROL_DPIENABLE_SHIFT                                    (0x00000006U)
 #define CSL_DSS_VP4_CONTROL_DPIENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPDIS                             (0x0U)
 #define CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPENB                             (0x1U)

 #define CSL_DSS_VP4_CONTROL_STDITHERENABLE_MASK                                (0x00000080U)
 #define CSL_DSS_VP4_CONTROL_STDITHERENABLE_SHIFT                               (0x00000007U)
 #define CSL_DSS_VP4_CONTROL_STDITHERENABLE_MAX                                 (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHDIS                       (0x0U)
 #define CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHENB                       (0x1U)

 #define CSL_DSS_VP4_CONTROL_DATALINES_MASK                                     (0x00000700U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_SHIFT                                    (0x00000008U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_MAX                                      (0x00000007U)

 #define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB12B                             (0x0U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB16B                             (0x1U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB18B                             (0x2U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB24B                             (0x3U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB30B                             (0x4U)
 #define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB36B                             (0x5U)

 #define CSL_DSS_VP4_CONTROL_STALLMODE_MASK                                     (0x00000800U)
 #define CSL_DSS_VP4_CONTROL_STALLMODE_SHIFT                                    (0x0000000BU)
 #define CSL_DSS_VP4_CONTROL_STALLMODE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLDIS                             (0x0U)
 #define CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLENB                             (0x1U)

 #define CSL_DSS_VP4_CONTROL_STALLMODETYPE_MASK                                 (0x00001000U)
 #define CSL_DSS_VP4_CONTROL_STALLMODETYPE_SHIFT                                (0x0000000CU)
 #define CSL_DSS_VP4_CONTROL_STALLMODETYPE_MAX                                  (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_COMMANDMODE                      (0x0U)
 #define CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_VIDEOMODE                        (0x1U)

 #define CSL_DSS_VP4_CONTROL_RESERVED3_MASK                                     (0x00002000U)
 #define CSL_DSS_VP4_CONTROL_RESERVED3_SHIFT                                    (0x0000000DU)
 #define CSL_DSS_VP4_CONTROL_RESERVED3_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_HT_MASK                                            (0x0001C000U)
 #define CSL_DSS_VP4_CONTROL_HT_SHIFT                                           (0x0000000EU)
 #define CSL_DSS_VP4_CONTROL_HT_MAX                                             (0x00000007U)

 #define CSL_DSS_VP4_CONTROL_RESERVED1_MASK                                     (0x000E0000U)
 #define CSL_DSS_VP4_CONTROL_RESERVED1_SHIFT                                    (0x00000011U)
 #define CSL_DSS_VP4_CONTROL_RESERVED1_MAX                                      (0x00000007U)

 #define CSL_DSS_VP4_CONTROL_TDMENABLE_MASK                                     (0x00100000U)
 #define CSL_DSS_VP4_CONTROL_TDMENABLE_SHIFT                                    (0x00000014U)
 #define CSL_DSS_VP4_CONTROL_TDMENABLE_MAX                                      (0x00000001U)

 #define CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMDIS                               (0x0U)
 #define CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMENB                               (0x1U)

 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MASK                               (0x00600000U)
 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MAX                                (0x00000003U)

 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT                      (0x0U)
 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT                      (0x1U)
 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT                     (0x2U)
 #define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT                     (0x3U)

 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MASK                                (0x01800000U)
 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_SHIFT                               (0x00000017U)
 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MAX                                 (0x00000003U)

 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX                      (0x0U)
 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX                      (0x1U)
 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX                      (0x2U)
 #define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX                     (0x3U)

 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MASK                                 (0x06000000U)
 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_SHIFT                                (0x00000019U)
 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MAX                                  (0x00000003U)

 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL                         (0x0U)
 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL                        (0x1U)
 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED                        (0x2U)
 #define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_RES                              (0x3U)

 #define CSL_DSS_VP4_CONTROL_RESERVED_MASK                                      (0x38000000U)
 #define CSL_DSS_VP4_CONTROL_RESERVED_SHIFT                                     (0x0000001BU)
 #define CSL_DSS_VP4_CONTROL_RESERVED_MAX                                       (0x00000007U)

 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK                (0xC0000000U)
 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT               (0x0000001EU)
 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX                 (0x00000003U)

 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME        (0x0U)
 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES       (0x1U)
 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES      (0x2U)
 #define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED        (0x3U)

 /* CSC_COEF0 */

 #define CSL_DSS_VP4_CSC_COEF0_C00_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP4_CSC_COEF0_C00_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF0_C00_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP4_CSC_COEF0_C01_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP4_CSC_COEF0_C01_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF0_C01_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MAX                                  (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_VP4_CSC_COEF1_C02_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP4_CSC_COEF1_C02_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF1_C02_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP4_CSC_COEF1_C10_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP4_CSC_COEF1_C10_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF1_C10_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MAX                                  (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_VP4_CSC_COEF2_C11_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP4_CSC_COEF2_C11_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF2_C11_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP4_CSC_COEF2_C12_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP4_CSC_COEF2_C12_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF2_C12_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MAX                                  (0x0000001FU)

 /* DATA_CYCLE_0 */

 #define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_1 */

 #define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MAX                                (0x0000000FU)

 /* DATA_CYCLE_2 */

 #define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MASK                             (0x0000001FU)
 #define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT                            (0x00000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MAX                              (0x0000001FU)

 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MASK                               (0x000000E0U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_SHIFT                              (0x00000005U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MAX                                (0x00000007U)

 #define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK                       (0x00000F00U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT                      (0x00000008U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX                        (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MASK                               (0x0000F000U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_SHIFT                              (0x0000000CU)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MAX                                (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MASK                             (0x001F0000U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT                            (0x00000010U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MAX                              (0x0000001FU)

 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MASK                               (0x00E00000U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_SHIFT                              (0x00000015U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MAX                                (0x00000007U)

 #define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK                       (0x0F000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT                      (0x00000018U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX                        (0x0000000FU)

 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MASK                               (0xF0000000U)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_SHIFT                              (0x0000001CU)
 #define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MAX                                (0x0000000FU)

 /* LINE_NUMBER */

 #define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP4_LINE_NUMBER_RESERVED_MASK                                  (0xFFFFC000U)
 #define CSL_DSS_VP4_LINE_NUMBER_RESERVED_SHIFT                                 (0x0000000EU)
 #define CSL_DSS_VP4_LINE_NUMBER_RESERVED_MAX                                   (0x0003FFFFU)

 /* POL_FREQ */

 #define CSL_DSS_VP4_POL_FREQ_ACB_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP4_POL_FREQ_ACB_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP4_POL_FREQ_ACB_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP4_POL_FREQ_ACBI_MASK                                         (0x00000F00U)
 #define CSL_DSS_VP4_POL_FREQ_ACBI_SHIFT                                        (0x00000008U)
 #define CSL_DSS_VP4_POL_FREQ_ACBI_MAX                                          (0x0000000FU)

 #define CSL_DSS_VP4_POL_FREQ_IVS_MASK                                          (0x00001000U)
 #define CSL_DSS_VP4_POL_FREQ_IVS_SHIFT                                         (0x0000000CU)
 #define CSL_DSS_VP4_POL_FREQ_IVS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAH                                  (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAL                                  (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_IHS_MASK                                          (0x00002000U)
 #define CSL_DSS_VP4_POL_FREQ_IHS_SHIFT                                         (0x0000000DU)
 #define CSL_DSS_VP4_POL_FREQ_IHS_MAX                                           (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAH                                  (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAL                                  (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_IPC_MASK                                          (0x00004000U)
 #define CSL_DSS_VP4_POL_FREQ_IPC_SHIFT                                         (0x0000000EU)
 #define CSL_DSS_VP4_POL_FREQ_IPC_MAX                                           (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_IPC_VAL_DRPCK                                     (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_IPC_VAL_DFPCK                                     (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_IEO_MASK                                          (0x00008000U)
 #define CSL_DSS_VP4_POL_FREQ_IEO_SHIFT                                         (0x0000000FU)
 #define CSL_DSS_VP4_POL_FREQ_IEO_MAX                                           (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBAHIGH                                  (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBALOW                                   (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_RF_MASK                                           (0x00010000U)
 #define CSL_DSS_VP4_POL_FREQ_RF_SHIFT                                          (0x00000010U)
 #define CSL_DSS_VP4_POL_FREQ_RF_MAX                                            (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_RF_VAL_DFEDPCK                                    (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_RF_VAL_DRIEDPCK                                   (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_ONOFF_MASK                                        (0x00020000U)
 #define CSL_DSS_VP4_POL_FREQ_ONOFF_SHIFT                                       (0x00000011U)
 #define CSL_DSS_VP4_POL_FREQ_ONOFF_MAX                                         (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DOPEDPCK                                (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DBIT16                                  (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_ALIGN_MASK                                        (0x00040000U)
 #define CSL_DSS_VP4_POL_FREQ_ALIGN_SHIFT                                       (0x00000012U)
 #define CSL_DSS_VP4_POL_FREQ_ALIGN_MAX                                         (0x00000001U)

 #define CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_NOTALIGNED                              (0x0U)
 #define CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_ALIGNED                                 (0x1U)

 #define CSL_DSS_VP4_POL_FREQ_RESERVED_MASK                                     (0xFFF80000U)
 #define CSL_DSS_VP4_POL_FREQ_RESERVED_SHIFT                                    (0x00000013U)
 #define CSL_DSS_VP4_POL_FREQ_RESERVED_MAX                                      (0x00001FFFU)

 /* SIZE_SCREEN */

 #define CSL_DSS_VP4_SIZE_SCREEN_PPL_MASK                                       (0x00003FFFU)
 #define CSL_DSS_VP4_SIZE_SCREEN_PPL_SHIFT                                      (0x00000000U)
 #define CSL_DSS_VP4_SIZE_SCREEN_PPL_MAX                                        (0x00003FFFU)

 #define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MASK                                 (0x0000C000U)
 #define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MAX                                  (0x00000003U)

 #define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_SAME                             (0x0U)
 #define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE                          (0x1U)
 #define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE                         (0x2U)

 #define CSL_DSS_VP4_SIZE_SCREEN_LPP_MASK                                       (0x3FFF0000U)
 #define CSL_DSS_VP4_SIZE_SCREEN_LPP_SHIFT                                      (0x00000010U)
 #define CSL_DSS_VP4_SIZE_SCREEN_LPP_MAX                                        (0x00003FFFU)

 /* TIMING_H */

 #define CSL_DSS_VP4_TIMING_H_HSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP4_TIMING_H_HSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP4_TIMING_H_HSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP4_TIMING_H_HFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP4_TIMING_H_HFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP4_TIMING_H_HFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP4_TIMING_H_HBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP4_TIMING_H_HBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP4_TIMING_H_HBP_MAX                                           (0x00000FFFU)

 /* TIMING_V */

 #define CSL_DSS_VP4_TIMING_V_VSW_MASK                                          (0x000000FFU)
 #define CSL_DSS_VP4_TIMING_V_VSW_SHIFT                                         (0x00000000U)
 #define CSL_DSS_VP4_TIMING_V_VSW_MAX                                           (0x000000FFU)

 #define CSL_DSS_VP4_TIMING_V_VFP_MASK                                          (0x000FFF00U)
 #define CSL_DSS_VP4_TIMING_V_VFP_SHIFT                                         (0x00000008U)
 #define CSL_DSS_VP4_TIMING_V_VFP_MAX                                           (0x00000FFFU)

 #define CSL_DSS_VP4_TIMING_V_VBP_MASK                                          (0xFFF00000U)
 #define CSL_DSS_VP4_TIMING_V_VBP_SHIFT                                         (0x00000014U)
 #define CSL_DSS_VP4_TIMING_V_VBP_MAX                                           (0x00000FFFU)

 /* CSC_COEF3 */

 #define CSL_DSS_VP4_CSC_COEF3_C20_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP4_CSC_COEF3_C20_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF3_C20_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MASK                                 (0x0000F800U)
 #define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MAX                                  (0x0000001FU)

 #define CSL_DSS_VP4_CSC_COEF3_C21_MASK                                         (0x07FF0000U)
 #define CSL_DSS_VP4_CSC_COEF3_C21_SHIFT                                        (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF3_C21_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MASK                                 (0xF8000000U)
 #define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_SHIFT                                (0x0000001BU)
 #define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MAX                                  (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_VP4_CSC_COEF4_C22_MASK                                         (0x000007FFU)
 #define CSL_DSS_VP4_CSC_COEF4_C22_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF4_C22_MAX                                          (0x000007FFU)

 #define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MASK                                 (0xFFFFF800U)
 #define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_SHIFT                                (0x0000000BU)
 #define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MAX                                  (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_VP4_CSC_COEF5_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP4_CSC_COEF5_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF5_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP4_CSC_COEF5_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP4_CSC_COEF5_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF5_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MASK                                  (0xFFF80000U)
 #define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_SHIFT                                 (0x00000013U)
 #define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MAX                                   (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_VP4_CSC_COEF6_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP4_CSC_COEF6_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF6_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_SHIFT                                 (0x00000003U)
 #define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MAX                                   (0x00001FFFU)

 #define CSL_DSS_VP4_CSC_COEF6_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP4_CSC_COEF6_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF6_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MAX                                  (0x00001FFFU)

 /* CSC_COEF7 */

 #define CSL_DSS_VP4_CSC_COEF7_RESERVED_MASK                                    (0x00000007U)
 #define CSL_DSS_VP4_CSC_COEF7_RESERVED_SHIFT                                   (0x00000000U)
 #define CSL_DSS_VP4_CSC_COEF7_RESERVED_MAX                                     (0x00000007U)

 #define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MASK                                 (0x0000FFF8U)
 #define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_SHIFT                                (0x00000003U)
 #define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MAX                                  (0x00001FFFU)

 #define CSL_DSS_VP4_CSC_COEF7_RESERVED1_MASK                                   (0x00070000U)
 #define CSL_DSS_VP4_CSC_COEF7_RESERVED1_SHIFT                                  (0x00000010U)
 #define CSL_DSS_VP4_CSC_COEF7_RESERVED1_MAX                                    (0x00000007U)

 #define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MASK                                 (0xFFF80000U)
 #define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_SHIFT                                (0x00000013U)
 #define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MAX                                  (0x00001FFFU)

 /* SAFETY_ATTRIBUTES */

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MASK                              (0x00000001U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MAX                               (0x00000001U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK                         (0x00000002U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT                        (0x00000001U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX                          (0x00000001U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE              (0x0U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK                (0x1U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MASK                          (0x00000004U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT                         (0x00000002U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MAX                           (0x00000001U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE                   (0x0U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE                    (0x1U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MASK                           (0x000007F8U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT                          (0x00000003U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MAX                            (0x000000FFU)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MASK                           (0x00001800U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT                          (0x0000000BU)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MAX                            (0x00000003U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP                     (0x0U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN                       (0x1U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD                        (0x2U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED                   (0x3U)

 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MASK                            (0xFFFFE000U)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_SHIFT                           (0x0000000DU)
 #define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MAX                             (0x0007FFFFU)

 /* SAFETY_CAPT_SIGNATURE */

 #define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK                       (0xFFFFFFFFU)
 #define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT                      (0x00000000U)
 #define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX                        (0xFFFFFFFFU)

 /* SAFETY_POSITION */

 #define CSL_DSS_VP4_SAFETY_POSITION_POSX_MASK                                  (0x00003FFFU)
 #define CSL_DSS_VP4_SAFETY_POSITION_POSX_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP4_SAFETY_POSITION_POSX_MAX                                   (0x00003FFFU)

 #define CSL_DSS_VP4_SAFETY_POSITION_POSY_MASK                                  (0x3FFF0000U)
 #define CSL_DSS_VP4_SAFETY_POSITION_POSY_SHIFT                                 (0x00000010U)
 #define CSL_DSS_VP4_SAFETY_POSITION_POSY_MAX                                   (0x00003FFFU)

 /* SAFETY_REF_SIGNATURE */

 #define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MASK                        (0xFFFFFFFFU)
 #define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT                       (0x00000000U)
 #define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MAX                         (0xFFFFFFFFU)

 /* SAFETY_SIZE */

 #define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MASK                                     (0x00003FFFU)
 #define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_SHIFT                                    (0x00000000U)
 #define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MAX                                      (0x00003FFFU)

 #define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MASK                                     (0x3FFF0000U)
 #define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_SHIFT                                    (0x00000010U)
 #define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MAX                                      (0x00003FFFU)

 /* SAFETY_LFSR_SEED */

 #define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MASK                                 (0xFFFFFFFFU)
 #define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MAX                                  (0xFFFFFFFFU)

 /* GAMMA_TABLE_0 */

 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_1 */

 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_2 */

 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_3 */

 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_4 */

 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_5 */

 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_6 */

 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_7 */

 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_8 */

 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_9 */

 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MASK                                 (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_SHIFT                                (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MASK                                 (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_SHIFT                                (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MASK                                 (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_SHIFT                                (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MAX                                  (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MASK                                   (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_SHIFT                                  (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MAX                                    (0x00000001U)

 /* GAMMA_TABLE_10 */

 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_11 */

 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_12 */

 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_13 */

 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_14 */

 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MAX                                   (0x00000001U)

 /* GAMMA_TABLE_15 */

 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MASK                                (0x000003FFU)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MASK                                (0x000FFC00U)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_SHIFT                               (0x0000000AU)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MASK                                (0x3FF00000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_SHIFT                               (0x00000014U)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MAX                                 (0x000003FFU)

 #define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MASK                                  (0x80000000U)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MAX                                   (0x00000001U)

 /* DSS_OLDI_CFG */

 #define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MASK                                (0x00003FFFU)
 #define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_SHIFT                               (0x00000000U)
 #define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MAX                                 (0x00003FFFU)

 #define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MASK                                 (0xFFFFC000U)
 #define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_SHIFT                                (0x0000000EU)
 #define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MAX                                  (0x0003FFFFU)

 /* DSS_OLDI_STATUS */

 #define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MASK                              (0xFFFFFFFFU)
 #define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_SHIFT                             (0x00000000U)
 #define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MAX                               (0xFFFFFFFFU)

 /* DSS_OLDI_LB */

 #define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MASK                                  (0xFFFFFFFFU)
 #define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MAX                                   (0xFFFFFFFFU)

 /* SECURE */

 #define CSL_DSS_VP4_SECURE_SECURE_MASK                                         (0x00000001U)
 #define CSL_DSS_VP4_SECURE_SECURE_SHIFT                                        (0x00000000U)
 #define CSL_DSS_VP4_SECURE_SECURE_MAX                                          (0x00000001U)

 #define CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREDIS                                (0x0U)
 #define CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREEN                                 (0x1U)

 #define CSL_DSS_VP4_SECURE_RESERVED_MASK                                       (0xFFFFFFFEU)
 #define CSL_DSS_VP4_SECURE_RESERVED_SHIFT                                      (0x00000001U)
 #define CSL_DSS_VP4_SECURE_RESERVED_MAX                                        (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : WB Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint32_t ACCUH_0;                   /* ACCUH_0 */
     volatile uint32_t ACCUH_1;                   /* ACCUH_1 */
     volatile uint32_t ACCUH2_0;                  /* ACCUH2_0 */
     volatile uint32_t ACCUH2_1;                  /* ACCUH2_1 */
     volatile uint32_t ACCUV_0;                   /* ACCUV_0 */
     volatile uint32_t ACCUV_1;                   /* ACCUV_1 */
     volatile uint32_t ACCUV2_0;                  /* ACCUV2_0 */
     volatile uint32_t ACCUV2_1;                  /* ACCUV2_1 */
     volatile uint32_t ATTRIBUTES;                /* ATTRIBUTES */
     volatile uint32_t ATTRIBUTES2;               /* ATTRIBUTES2 */
     volatile uint32_t BA_0;                      /* BA_0 */
     volatile uint32_t BA_1;                      /* BA_1 */
     volatile uint32_t BA_UV_0;                   /* BA_UV_0 */
     volatile uint32_t BA_UV_1;                   /* BA_UV_1 */
     volatile uint32_t BUF_SIZE_STATUS;           /* BUF_SIZE_STATUS */
     volatile uint32_t BUF_THRESHOLD;             /* BUF_THRESHOLD */
     volatile uint32_t CSC_COEF0;                 /* CSC_COEF0 */
     volatile uint32_t CSC_COEF1;                 /* CSC_COEF1 */
     volatile uint32_t CSC_COEF2;                 /* CSC_COEF2 */
     volatile uint32_t CSC_COEF3;                 /* CSC_COEF3 */
     volatile uint32_t CSC_COEF4;                 /* CSC_COEF4 */
     volatile uint32_t CSC_COEF5;                 /* CSC_COEF5 */
     volatile uint32_t CSC_COEF6;                 /* CSC_COEF6 */
     volatile uint32_t FIRH;                      /* FIRH */
     volatile uint32_t FIRH2;                     /* FIRH2 */
     volatile uint32_t FIRV;                      /* FIRV */
     volatile uint32_t FIRV2;                     /* FIRV2 */
     volatile uint32_t FIR_COEF_H0[9U];           /* FIR_COEF_H0 0..8 */
     volatile uint32_t FIR_COEF_H0_C[9U];         /* FIR_COEF_H0_C 0..8 */
     volatile uint32_t FIR_COEF_H12[16U];         /* FIR_COEF_H12 0..15 */
     volatile uint32_t FIR_COEF_H12_C[16U];       /* FIR_COEF_H12_C 0..15 */
     volatile uint32_t FIR_COEF_V0[9U];           /* FIR_COEF_V0 0..8 */
     volatile uint32_t FIR_COEF_V0_C[9U];         /* FIR_COEF_V0_C 0..8 */
     volatile uint32_t FIR_COEF_V12[16U];         /* FIR_COEF_V12 0..15 */
     volatile uint32_t FIR_COEF_V12_C[16U];       /* FIR_COEF_V12_C 0..15 */
     volatile uint8_t  Resv_516[8];
     volatile uint32_t MFLAG_THRESHOLD;           /* MFLAG_THRESHOLD */
     volatile uint32_t PICTURE_SIZE;              /* PICTURE_SIZE */
     volatile uint8_t  Resv_528[4];
     volatile uint32_t SIZE;                      /* SIZE */
     volatile uint32_t POSITION;                  /* POSITION */
     volatile uint8_t  Resv_540[4];
     volatile uint32_t CSC_COEF7;                 /* CSC_COEF7 */
     volatile uint8_t  Resv_548[4];
     volatile uint32_t ROW_INC;                   /* ROW_INC */
     volatile uint32_t ROW_INC_UV;                /* ROW_INC_UV */
     volatile uint32_t BA_EXT_0;                  /* BA_EXT_0 */
     volatile uint32_t BA_EXT_1;                  /* BA_EXT_1 */
     volatile uint32_t BA_UV_EXT_0;               /* BA_UV_EXT_0 */
     volatile uint32_t BA_UV_EXT_1;               /* BA_UV_EXT_1 */
     volatile uint8_t  Resv_584[12];
     volatile uint32_t SECURE;                    /* SECURE */
 } CSL_dss_wbRegs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_WB_ACCUH_0                                                     (0x00000000U)
 #define CSL_DSS_WB_ACCUH_1                                                     (0x00000004U)
 #define CSL_DSS_WB_ACCUH2_0                                                    (0x00000008U)
 #define CSL_DSS_WB_ACCUH2_1                                                    (0x0000000CU)
 #define CSL_DSS_WB_ACCUV_0                                                     (0x00000010U)
 #define CSL_DSS_WB_ACCUV_1                                                     (0x00000014U)
 #define CSL_DSS_WB_ACCUV2_0                                                    (0x00000018U)
 #define CSL_DSS_WB_ACCUV2_1                                                    (0x0000001CU)
 #define CSL_DSS_WB_ATTRIBUTES                                                  (0x00000020U)
 #define CSL_DSS_WB_ATTRIBUTES2                                                 (0x00000024U)
 #define CSL_DSS_WB_BA_0                                                        (0x00000028U)
 #define CSL_DSS_WB_BA_1                                                        (0x0000002CU)
 #define CSL_DSS_WB_BA_UV_0                                                     (0x00000030U)
 #define CSL_DSS_WB_BA_UV_1                                                     (0x00000034U)
 #define CSL_DSS_WB_BUF_SIZE_STATUS                                             (0x00000038U)
 #define CSL_DSS_WB_BUF_THRESHOLD                                               (0x0000003CU)
 #define CSL_DSS_WB_CSC_COEF0                                                   (0x00000040U)
 #define CSL_DSS_WB_CSC_COEF1                                                   (0x00000044U)
 #define CSL_DSS_WB_CSC_COEF2                                                   (0x00000048U)
 #define CSL_DSS_WB_CSC_COEF3                                                   (0x0000004CU)
 #define CSL_DSS_WB_CSC_COEF4                                                   (0x00000050U)
 #define CSL_DSS_WB_CSC_COEF5                                                   (0x00000054U)
 #define CSL_DSS_WB_CSC_COEF6                                                   (0x00000058U)
 #define CSL_DSS_WB_FIRH                                                        (0x0000005CU)
 #define CSL_DSS_WB_FIRH2                                                       (0x00000060U)
 #define CSL_DSS_WB_FIRV                                                        (0x00000064U)
 #define CSL_DSS_WB_FIRV2                                                       (0x00000068U)
 #define CSL_DSS_WB_FIR_COEF_H0(index)                                          (0x0000006CU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_H0_C(index)                                        (0x00000090U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_H12(index)                                         (0x000000B4U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_H12_C(index)                                       (0x000000F4U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_V0(index)                                          (0x00000134U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_V0_C(index)                                        (0x00000158U+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_V12(index)                                         (0x0000017CU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_FIR_COEF_V12_C(index)                                       (0x000001BCU+((uint32_t)(index)*0x4U))
 #define CSL_DSS_WB_MFLAG_THRESHOLD                                             (0x00000204U)
 #define CSL_DSS_WB_PICTURE_SIZE                                                (0x00000208U)
 #define CSL_DSS_WB_SIZE                                                        (0x00000210U)
 #define CSL_DSS_WB_POSITION                                                    (0x00000214U)
 #define CSL_DSS_WB_CSC_COEF7                                                   (0x0000021CU)
 #define CSL_DSS_WB_ROW_INC                                                     (0x00000224U)
 #define CSL_DSS_WB_ROW_INC_UV                                                  (0x00000228U)
 #define CSL_DSS_WB_BA_EXT_0                                                    (0x0000022CU)
 #define CSL_DSS_WB_BA_EXT_1                                                    (0x00000230U)
 #define CSL_DSS_WB_BA_UV_EXT_0                                                 (0x00000234U)
 #define CSL_DSS_WB_BA_UV_EXT_1                                                 (0x00000238U)
 #define CSL_DSS_WB_SECURE                                                      (0x00000248U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* ACCUH_0 */

 #define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MASK                                 (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_SHIFT                                (0x00000000U)
 #define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MAX                                  (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUH_0_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_WB_ACCUH_0_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_WB_ACCUH_0_RESERVED_MAX                                        (0x000000FFU)

 /* ACCUH_1 */

 #define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MASK                                 (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_SHIFT                                (0x00000000U)
 #define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MAX                                  (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUH_1_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_WB_ACCUH_1_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_WB_ACCUH_1_RESERVED_MAX                                        (0x000000FFU)

 /* ACCUH2_0 */

 #define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MASK                                (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_SHIFT                               (0x00000000U)
 #define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MAX                                 (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUH2_0_RESERVED_MASK                                      (0xFF000000U)
 #define CSL_DSS_WB_ACCUH2_0_RESERVED_SHIFT                                     (0x00000018U)
 #define CSL_DSS_WB_ACCUH2_0_RESERVED_MAX                                       (0x000000FFU)

 /* ACCUH2_1 */

 #define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MASK                                (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_SHIFT                               (0x00000000U)
 #define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MAX                                 (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUH2_1_RESERVED_MASK                                      (0xFF000000U)
 #define CSL_DSS_WB_ACCUH2_1_RESERVED_SHIFT                                     (0x00000018U)
 #define CSL_DSS_WB_ACCUH2_1_RESERVED_MAX                                       (0x000000FFU)

 /* ACCUV_0 */

 #define CSL_DSS_WB_ACCUV_0_VERTICALACCU_MASK                                   (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUV_0_VERTICALACCU_SHIFT                                  (0x00000000U)
 #define CSL_DSS_WB_ACCUV_0_VERTICALACCU_MAX                                    (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUV_0_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_WB_ACCUV_0_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_WB_ACCUV_0_RESERVED_MAX                                        (0x000000FFU)

 /* ACCUV_1 */

 #define CSL_DSS_WB_ACCUV_1_VERTICALACCU_MASK                                   (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUV_1_VERTICALACCU_SHIFT                                  (0x00000000U)
 #define CSL_DSS_WB_ACCUV_1_VERTICALACCU_MAX                                    (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUV_1_RESERVED_MASK                                       (0xFF000000U)
 #define CSL_DSS_WB_ACCUV_1_RESERVED_SHIFT                                      (0x00000018U)
 #define CSL_DSS_WB_ACCUV_1_RESERVED_MAX                                        (0x000000FFU)

 /* ACCUV2_0 */

 #define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MASK                                  (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MAX                                   (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUV2_0_RESERVED_MASK                                      (0xFF000000U)
 #define CSL_DSS_WB_ACCUV2_0_RESERVED_SHIFT                                     (0x00000018U)
 #define CSL_DSS_WB_ACCUV2_0_RESERVED_MAX                                       (0x000000FFU)

 /* ACCUV2_1 */

 #define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MASK                                  (0x00FFFFFFU)
 #define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MAX                                   (0x00FFFFFFU)

 #define CSL_DSS_WB_ACCUV2_1_RESERVED_MASK                                      (0xFF000000U)
 #define CSL_DSS_WB_ACCUV2_1_RESERVED_SHIFT                                     (0x00000018U)
 #define CSL_DSS_WB_ACCUV2_1_RESERVED_MAX                                       (0x000000FFU)

 /* ATTRIBUTES */

 #define CSL_DSS_WB_ATTRIBUTES_ENABLE_MASK                                      (0x00000001U)
 #define CSL_DSS_WB_ATTRIBUTES_ENABLE_SHIFT                                     (0x00000000U)
 #define CSL_DSS_WB_ATTRIBUTES_ENABLE_MAX                                       (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBDIS                                 (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBENB                                 (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_MASK                                      (0x0000007EU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_SHIFT                                     (0x00000001U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_MAX                                       (0x0000003FU)

 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_4444                           (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_4444                           (0x1U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA16_4444                           (0x2U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB16_565                             (0x3U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR16_565                             (0x4U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_1555                           (0x5U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_1555                           (0x6U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB32_8888                           (0x7U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR32_8888                           (0x8U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA32_8888                           (0x9U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRA32_8888                           (0xAU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB24P_888                            (0xBU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616                       (0x10U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616                       (0x11U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB565A8                              (0x16U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR565A8                              (0x17U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_4444                           (0x20U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_4444                           (0x21U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX16_4444                           (0x22U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_1555                           (0x25U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_1555                           (0x26U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB32_8888                           (0x27U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR32_8888                           (0x28U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX32_8888                           (0x29U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRX32_8888                           (0x2AU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616                       (0x30U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616                       (0x31U)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_NV12                           (0x3CU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV420_NV12                           (0x3DU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2                           (0x3EU)
 #define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY                           (0x3FU)

 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MASK                                (0x00000180U)
 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_SHIFT                               (0x00000007U)
 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MAX                                 (0x00000003U)

 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC                      (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE                         (0x1U)
 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE                         (0x2U)
 #define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE                        (0x3U)

 #define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MASK                                 (0x00000200U)
 #define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_SHIFT                                (0x00000009U)
 #define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MAX                                  (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_DISABLE                          (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_ENABLE                           (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_RESERVED1_MASK                                   (0x00000400U)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED1_SHIFT                                  (0x0000000AU)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED1_MAX                                    (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MASK                             (0x00000800U)
 #define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_SHIFT                            (0x0000000BU)
 #define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MAX                              (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS                    (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB                    (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MASK                                   (0x00001000U)
 #define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_SHIFT                                  (0x0000000CU)
 #define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MAX                                    (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE                           (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE                          (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_RESERVED2_MASK                                   (0x00002000U)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED2_SHIFT                                  (0x0000000DU)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED2_MAX                                    (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_RESERVED3_MASK                                   (0x0007C000U)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED3_SHIFT                                  (0x0000000EU)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED3_MAX                                    (0x0000001FU)

 #define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MASK                               (0x00080000U)
 #define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_SHIFT                              (0x00000013U)
 #define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MAX                                (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_CAPTURE                        (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_MEM2MEM                        (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_GOBIT_MASK                                       (0x00100000U)
 #define CSL_DSS_WB_ATTRIBUTES_GOBIT_SHIFT                                      (0x00000014U)
 #define CSL_DSS_WB_ATTRIBUTES_GOBIT_SET                                        (0x00000001U)
 #define CSL_DSS_WB_ATTRIBUTES_GOBIT_MAX                                        (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_HFUISR                                 (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_UFPSR                                  (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MASK                                (0x00200000U)
 #define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_SHIFT                               (0x00000015U)
 #define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MAX                                 (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3                           (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5                           (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_RESERVED4_MASK                                   (0x00400000U)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED4_SHIFT                                  (0x00000016U)
 #define CSL_DSS_WB_ATTRIBUTES_RESERVED4_MAX                                    (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MASK                                 (0x00800000U)
 #define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_SHIFT                                (0x00000017U)
 #define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MAX                                  (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO                       (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO                         (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MASK                                 (0x07000000U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_SHIFT                                (0x00000018U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MAX                                  (0x00000007U)

 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ALL                              (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1                            (0x1U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_2                          (0x2U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_3                          (0x3U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_4                          (0x4U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_5                          (0x5U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_6                          (0x6U)
 #define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_7                          (0x7U)

 #define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MASK                                    (0x08000000U)
 #define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_SHIFT                                   (0x0000001BU)
 #define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MAX                                     (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLESINGLE                          (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLEBURST                           (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MASK                                  (0xF0000000U)
 #define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_SHIFT                                 (0x0000001CU)
 #define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MAX                                   (0x0000000FU)

 /* ATTRIBUTES2 */

 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED_MASK                                   (0x00000001U)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED_SHIFT                                  (0x00000000U)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED_MAX                                    (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MASK                                  (0x0000007EU)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_SHIFT                                 (0x00000001U)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MAX                                   (0x0000003FU)

 #define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MASK                                   (0x00000180U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_SHIFT                                  (0x00000007U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MAX                                    (0x00000003U)

 #define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_8B                                 (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_10B                                (0x1U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_12B                                (0x2U)

 #define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MASK                                   (0x00000200U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_SHIFT                                  (0x00000009U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MAX                                    (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_PACKED                             (0x0U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED                           (0x1U)

 #define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MASK                                  (0x00000400U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MAX                                   (0x00000001U)

 #define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_MSB                               (0x1U)
 #define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_LSB                               (0x0U)

 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MASK                                  (0x03FFF800U)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_SHIFT                                 (0x0000000BU)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MAX                                   (0x00007FFFU)

 #define CSL_DSS_WB_ATTRIBUTES2_TAGS_MASK                                       (0x7C000000U)
 #define CSL_DSS_WB_ATTRIBUTES2_TAGS_SHIFT                                      (0x0000001AU)
 #define CSL_DSS_WB_ATTRIBUTES2_TAGS_MAX                                        (0x0000001FU)

 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MASK                                  (0x80000000U)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_SHIFT                                 (0x0000001FU)
 #define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MAX                                   (0x00000001U)

 /* BA_0 */

 #define CSL_DSS_WB_BA_0_BA_MASK                                                (0xFFFFFFFFU)
 #define CSL_DSS_WB_BA_0_BA_SHIFT                                               (0x00000000U)
 #define CSL_DSS_WB_BA_0_BA_MAX                                                 (0xFFFFFFFFU)

 /* BA_1 */

 #define CSL_DSS_WB_BA_1_BA_MASK                                                (0xFFFFFFFFU)
 #define CSL_DSS_WB_BA_1_BA_SHIFT                                               (0x00000000U)
 #define CSL_DSS_WB_BA_1_BA_MAX                                                 (0xFFFFFFFFU)

 /* BA_UV_0 */

 #define CSL_DSS_WB_BA_UV_0_BA_MASK                                             (0xFFFFFFFFU)
 #define CSL_DSS_WB_BA_UV_0_BA_SHIFT                                            (0x00000000U)
 #define CSL_DSS_WB_BA_UV_0_BA_MAX                                              (0xFFFFFFFFU)

 /* BA_UV_1 */

 #define CSL_DSS_WB_BA_UV_1_BA_MASK                                             (0xFFFFFFFFU)
 #define CSL_DSS_WB_BA_UV_1_BA_SHIFT                                            (0x00000000U)
 #define CSL_DSS_WB_BA_UV_1_BA_MAX                                              (0xFFFFFFFFU)

 /* BUF_SIZE_STATUS */

 #define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MASK                                (0x0000FFFFU)
 #define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_SHIFT                               (0x00000000U)
 #define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MAX                                 (0x0000FFFFU)

 #define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MASK                               (0xFFFF0000U)
 #define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_SHIFT                              (0x00000010U)
 #define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MAX                                (0x0000FFFFU)

 /* BUF_THRESHOLD */

 #define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK                          (0x0000FFFFU)
 #define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT                         (0x00000000U)
 #define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX                           (0x0000FFFFU)

 #define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK                         (0xFFFF0000U)
 #define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT                        (0x00000010U)
 #define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX                          (0x0000FFFFU)

 /* CSC_COEF0 */

 #define CSL_DSS_WB_CSC_COEF0_C00_MASK                                          (0x000007FFU)
 #define CSL_DSS_WB_CSC_COEF0_C00_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF0_C00_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF0_RESERVED_53_MASK                                  (0x0000F800U)
 #define CSL_DSS_WB_CSC_COEF0_RESERVED_53_SHIFT                                 (0x0000000BU)
 #define CSL_DSS_WB_CSC_COEF0_RESERVED_53_MAX                                   (0x0000001FU)

 #define CSL_DSS_WB_CSC_COEF0_C01_MASK                                          (0x07FF0000U)
 #define CSL_DSS_WB_CSC_COEF0_C01_SHIFT                                         (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF0_C01_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF0_RESERVED_52_MASK                                  (0xF8000000U)
 #define CSL_DSS_WB_CSC_COEF0_RESERVED_52_SHIFT                                 (0x0000001BU)
 #define CSL_DSS_WB_CSC_COEF0_RESERVED_52_MAX                                   (0x0000001FU)

 /* CSC_COEF1 */

 #define CSL_DSS_WB_CSC_COEF1_C02_MASK                                          (0x000007FFU)
 #define CSL_DSS_WB_CSC_COEF1_C02_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF1_C02_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF1_RESERVED_55_MASK                                  (0x0000F800U)
 #define CSL_DSS_WB_CSC_COEF1_RESERVED_55_SHIFT                                 (0x0000000BU)
 #define CSL_DSS_WB_CSC_COEF1_RESERVED_55_MAX                                   (0x0000001FU)

 #define CSL_DSS_WB_CSC_COEF1_C10_MASK                                          (0x07FF0000U)
 #define CSL_DSS_WB_CSC_COEF1_C10_SHIFT                                         (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF1_C10_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF1_RESERVED_54_MASK                                  (0xF8000000U)
 #define CSL_DSS_WB_CSC_COEF1_RESERVED_54_SHIFT                                 (0x0000001BU)
 #define CSL_DSS_WB_CSC_COEF1_RESERVED_54_MAX                                   (0x0000001FU)

 /* CSC_COEF2 */

 #define CSL_DSS_WB_CSC_COEF2_C11_MASK                                          (0x000007FFU)
 #define CSL_DSS_WB_CSC_COEF2_C11_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF2_C11_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF2_RESERVED_57_MASK                                  (0x0000F800U)
 #define CSL_DSS_WB_CSC_COEF2_RESERVED_57_SHIFT                                 (0x0000000BU)
 #define CSL_DSS_WB_CSC_COEF2_RESERVED_57_MAX                                   (0x0000001FU)

 #define CSL_DSS_WB_CSC_COEF2_C12_MASK                                          (0x07FF0000U)
 #define CSL_DSS_WB_CSC_COEF2_C12_SHIFT                                         (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF2_C12_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF2_RESERVED_56_MASK                                  (0xF8000000U)
 #define CSL_DSS_WB_CSC_COEF2_RESERVED_56_SHIFT                                 (0x0000001BU)
 #define CSL_DSS_WB_CSC_COEF2_RESERVED_56_MAX                                   (0x0000001FU)

 /* CSC_COEF3 */

 #define CSL_DSS_WB_CSC_COEF3_C20_MASK                                          (0x000007FFU)
 #define CSL_DSS_WB_CSC_COEF3_C20_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF3_C20_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF3_RESERVED_59_MASK                                  (0x0000F800U)
 #define CSL_DSS_WB_CSC_COEF3_RESERVED_59_SHIFT                                 (0x0000000BU)
 #define CSL_DSS_WB_CSC_COEF3_RESERVED_59_MAX                                   (0x0000001FU)

 #define CSL_DSS_WB_CSC_COEF3_C21_MASK                                          (0x07FF0000U)
 #define CSL_DSS_WB_CSC_COEF3_C21_SHIFT                                         (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF3_C21_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF3_RESERVED_58_MASK                                  (0xF8000000U)
 #define CSL_DSS_WB_CSC_COEF3_RESERVED_58_SHIFT                                 (0x0000001BU)
 #define CSL_DSS_WB_CSC_COEF3_RESERVED_58_MAX                                   (0x0000001FU)

 /* CSC_COEF4 */

 #define CSL_DSS_WB_CSC_COEF4_C22_MASK                                          (0x000007FFU)
 #define CSL_DSS_WB_CSC_COEF4_C22_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF4_C22_MAX                                           (0x000007FFU)

 #define CSL_DSS_WB_CSC_COEF4_RESERVED_60_MASK                                  (0xFFFFF800U)
 #define CSL_DSS_WB_CSC_COEF4_RESERVED_60_SHIFT                                 (0x0000000BU)
 #define CSL_DSS_WB_CSC_COEF4_RESERVED_60_MAX                                   (0x001FFFFFU)

 /* CSC_COEF5 */

 #define CSL_DSS_WB_CSC_COEF5_RESERVED_MASK                                     (0x00000007U)
 #define CSL_DSS_WB_CSC_COEF5_RESERVED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF5_RESERVED_MAX                                      (0x00000007U)

 #define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MASK                                   (0x0000FFF8U)
 #define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_SHIFT                                  (0x00000003U)
 #define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MAX                                    (0x00001FFFU)

 #define CSL_DSS_WB_CSC_COEF5_RESERVED1_MASK                                    (0x00070000U)
 #define CSL_DSS_WB_CSC_COEF5_RESERVED1_SHIFT                                   (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF5_RESERVED1_MAX                                     (0x00000007U)

 #define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MASK                                   (0xFFF80000U)
 #define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_SHIFT                                  (0x00000013U)
 #define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MAX                                    (0x00001FFFU)

 /* CSC_COEF6 */

 #define CSL_DSS_WB_CSC_COEF6_RESERVED_MASK                                     (0x00000007U)
 #define CSL_DSS_WB_CSC_COEF6_RESERVED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF6_RESERVED_MAX                                      (0x00000007U)

 #define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MASK                                   (0x0000FFF8U)
 #define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_SHIFT                                  (0x00000003U)
 #define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MAX                                    (0x00001FFFU)

 #define CSL_DSS_WB_CSC_COEF6_RESERVED1_MASK                                    (0x00070000U)
 #define CSL_DSS_WB_CSC_COEF6_RESERVED1_SHIFT                                   (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF6_RESERVED1_MAX                                     (0x00000007U)

 #define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MASK                                  (0xFFF80000U)
 #define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_SHIFT                                 (0x00000013U)
 #define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MAX                                   (0x00001FFFU)

 /* FIRH */

 #define CSL_DSS_WB_FIRH_FIRHINC_MASK                                           (0x00FFFFFFU)
 #define CSL_DSS_WB_FIRH_FIRHINC_SHIFT                                          (0x00000000U)
 #define CSL_DSS_WB_FIRH_FIRHINC_MAX                                            (0x00FFFFFFU)

 #define CSL_DSS_WB_FIRH_RESERVED_MASK                                          (0xFF000000U)
 #define CSL_DSS_WB_FIRH_RESERVED_SHIFT                                         (0x00000018U)
 #define CSL_DSS_WB_FIRH_RESERVED_MAX                                           (0x000000FFU)

 /* FIRH2 */

 #define CSL_DSS_WB_FIRH2_FIRHINC_MASK                                          (0x00FFFFFFU)
 #define CSL_DSS_WB_FIRH2_FIRHINC_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_FIRH2_FIRHINC_MAX                                           (0x00FFFFFFU)

 #define CSL_DSS_WB_FIRH2_RESERVED_MASK                                         (0xFF000000U)
 #define CSL_DSS_WB_FIRH2_RESERVED_SHIFT                                        (0x00000018U)
 #define CSL_DSS_WB_FIRH2_RESERVED_MAX                                          (0x000000FFU)

 /* FIRV */

 #define CSL_DSS_WB_FIRV_FIRVINC_MASK                                           (0x00FFFFFFU)
 #define CSL_DSS_WB_FIRV_FIRVINC_SHIFT                                          (0x00000000U)
 #define CSL_DSS_WB_FIRV_FIRVINC_MAX                                            (0x00FFFFFFU)

 #define CSL_DSS_WB_FIRV_RESERVED_MASK                                          (0xFF000000U)
 #define CSL_DSS_WB_FIRV_RESERVED_SHIFT                                         (0x00000018U)
 #define CSL_DSS_WB_FIRV_RESERVED_MAX                                           (0x000000FFU)

 /* FIRV2 */

 #define CSL_DSS_WB_FIRV2_FIRVINC_MASK                                          (0x00FFFFFFU)
 #define CSL_DSS_WB_FIRV2_FIRVINC_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_FIRV2_FIRVINC_MAX                                           (0x00FFFFFFU)

 #define CSL_DSS_WB_FIRV2_RESERVED_MASK                                         (0xFF000000U)
 #define CSL_DSS_WB_FIRV2_RESERVED_SHIFT                                        (0x00000018U)
 #define CSL_DSS_WB_FIRV2_RESERVED_MAX                                          (0x000000FFU)

 /* FIR_COEF_H0 */

 #define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MASK                                     (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_SHIFT                                    (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MAX                                      (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H0_RESERVED_MASK                                   (0x3FFFFC00U)
 #define CSL_DSS_WB_FIR_COEF_H0_RESERVED_SHIFT                                  (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_H0_RESERVED_MAX                                    (0x000FFFFFU)

 #define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MASK                                  (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_SHIFT                                 (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MAX                                   (0x00000003U)

 /* FIR_COEF_H0_C */

 #define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MASK                                   (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_SHIFT                                  (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MAX                                    (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MASK                                 (0x3FFFFC00U)
 #define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_SHIFT                                (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MAX                                  (0x000FFFFFU)

 #define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MASK                                (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_SHIFT                               (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MAX                                 (0x00000003U)

 /* FIR_COEF_H12 */

 #define CSL_DSS_WB_FIR_COEF_H12_RESERVED_MASK                                  (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_H12_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_H12_RESERVED_MAX                                   (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MASK                                    (0x000FFC00U)
 #define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_SHIFT                                   (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MAX                                     (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MASK                                    (0x3FF00000U)
 #define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_SHIFT                                   (0x00000014U)
 #define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MAX                                     (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MASK                                 (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_SHIFT                                (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MAX                                  (0x00000003U)

 /* FIR_COEF_H12_C */

 #define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MASK                                (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_SHIFT                               (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MAX                                 (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MASK                                  (0x000FFC00U)
 #define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MAX                                   (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MASK                                  (0x3FF00000U)
 #define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_SHIFT                                 (0x00000014U)
 #define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MAX                                   (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MASK                               (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_SHIFT                              (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MAX                                (0x00000003U)

 /* FIR_COEF_V0 */

 #define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MASK                                     (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_SHIFT                                    (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MAX                                      (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V0_RESERVED_MASK                                   (0x3FFFFC00U)
 #define CSL_DSS_WB_FIR_COEF_V0_RESERVED_SHIFT                                  (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_V0_RESERVED_MAX                                    (0x000FFFFFU)

 #define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MASK                                  (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_SHIFT                                 (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MAX                                   (0x00000003U)

 /* FIR_COEF_V0_C */

 #define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MASK                                   (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_SHIFT                                  (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MAX                                    (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MASK                                 (0x3FFFFC00U)
 #define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_SHIFT                                (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MAX                                  (0x000FFFFFU)

 #define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MASK                                (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_SHIFT                               (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MAX                                 (0x00000003U)

 /* FIR_COEF_V12 */

 #define CSL_DSS_WB_FIR_COEF_V12_RESERVED_MASK                                  (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_V12_RESERVED_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_V12_RESERVED_MAX                                   (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MASK                                    (0x000FFC00U)
 #define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_SHIFT                                   (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MAX                                     (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MASK                                    (0x3FF00000U)
 #define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_SHIFT                                   (0x00000014U)
 #define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MAX                                     (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MASK                                 (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_SHIFT                                (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MAX                                  (0x00000003U)

 /* FIR_COEF_V12_C */

 #define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MASK                                (0x000003FFU)
 #define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_SHIFT                               (0x00000000U)
 #define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MAX                                 (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MASK                                  (0x000FFC00U)
 #define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_SHIFT                                 (0x0000000AU)
 #define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MAX                                   (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MASK                                  (0x3FF00000U)
 #define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_SHIFT                                 (0x00000014U)
 #define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MAX                                   (0x000003FFU)

 #define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MASK                               (0xC0000000U)
 #define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_SHIFT                              (0x0000001EU)
 #define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MAX                                (0x00000003U)

 /* MFLAG_THRESHOLD */

 #define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MASK                               (0x0000FFFFU)
 #define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_SHIFT                              (0x00000000U)
 #define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MAX                                (0x0000FFFFU)

 #define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MASK                               (0xFFFF0000U)
 #define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_SHIFT                              (0x00000010U)
 #define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MAX                                (0x0000FFFFU)

 /* PICTURE_SIZE */

 #define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MASK                                  (0x00003FFFU)
 #define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MAX                                   (0x00003FFFU)

 #define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MASK                                  (0x3FFF0000U)
 #define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_SHIFT                                 (0x00000010U)
 #define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MAX                                   (0x00003FFFU)

 /* SIZE */

 #define CSL_DSS_WB_SIZE_SIZEX_MASK                                             (0x00003FFFU)
 #define CSL_DSS_WB_SIZE_SIZEX_SHIFT                                            (0x00000000U)
 #define CSL_DSS_WB_SIZE_SIZEX_MAX                                              (0x00003FFFU)

 #define CSL_DSS_WB_SIZE_SIZEY_MASK                                             (0x3FFF0000U)
 #define CSL_DSS_WB_SIZE_SIZEY_SHIFT                                            (0x00000010U)
 #define CSL_DSS_WB_SIZE_SIZEY_MAX                                              (0x00003FFFU)

 /* POSITION */

 #define CSL_DSS_WB_POSITION_POSX_MASK                                          (0x00003FFFU)
 #define CSL_DSS_WB_POSITION_POSX_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_POSITION_POSX_MAX                                           (0x00003FFFU)

 #define CSL_DSS_WB_POSITION_RESERVED_MASK                                      (0x0000C000U)
 #define CSL_DSS_WB_POSITION_RESERVED_SHIFT                                     (0x0000000EU)
 #define CSL_DSS_WB_POSITION_RESERVED_MAX                                       (0x00000003U)

 #define CSL_DSS_WB_POSITION_POSY_MASK                                          (0x3FFF0000U)
 #define CSL_DSS_WB_POSITION_POSY_SHIFT                                         (0x00000010U)
 #define CSL_DSS_WB_POSITION_POSY_MAX                                           (0x00003FFFU)

 #define CSL_DSS_WB_POSITION_RESERVED1_MASK                                     (0xC0000000U)
 #define CSL_DSS_WB_POSITION_RESERVED1_SHIFT                                    (0x0000001EU)
 #define CSL_DSS_WB_POSITION_RESERVED1_MAX                                      (0x00000003U)

 /* CSC_COEF7 */

 #define CSL_DSS_WB_CSC_COEF7_RESERVED_MASK                                     (0x00000007U)
 #define CSL_DSS_WB_CSC_COEF7_RESERVED_SHIFT                                    (0x00000000U)
 #define CSL_DSS_WB_CSC_COEF7_RESERVED_MAX                                      (0x00000007U)

 #define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MASK                                  (0x0000FFF8U)
 #define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_SHIFT                                 (0x00000003U)
 #define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MAX                                   (0x00001FFFU)

 #define CSL_DSS_WB_CSC_COEF7_RESERVED1_MASK                                    (0x00070000U)
 #define CSL_DSS_WB_CSC_COEF7_RESERVED1_SHIFT                                   (0x00000010U)
 #define CSL_DSS_WB_CSC_COEF7_RESERVED1_MAX                                     (0x00000007U)

 #define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MASK                                  (0xFFF80000U)
 #define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_SHIFT                                 (0x00000013U)
 #define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MAX                                   (0x00001FFFU)

 /* ROW_INC */

 #define CSL_DSS_WB_ROW_INC_ROWINC_MASK                                         (0xFFFFFFFFU)
 #define CSL_DSS_WB_ROW_INC_ROWINC_SHIFT                                        (0x00000000U)
 #define CSL_DSS_WB_ROW_INC_ROWINC_MAX                                          (0xFFFFFFFFU)

 /* ROW_INC_UV */

 #define CSL_DSS_WB_ROW_INC_UV_ROWINC_MASK                                      (0xFFFFFFFFU)
 #define CSL_DSS_WB_ROW_INC_UV_ROWINC_SHIFT                                     (0x00000000U)
 #define CSL_DSS_WB_ROW_INC_UV_ROWINC_MAX                                       (0xFFFFFFFFU)

 /* BA_EXT_0 */

 #define CSL_DSS_WB_BA_EXT_0_BA_EXT_MASK                                        (0x0000FFFFU)
 #define CSL_DSS_WB_BA_EXT_0_BA_EXT_SHIFT                                       (0x00000000U)
 #define CSL_DSS_WB_BA_EXT_0_BA_EXT_MAX                                         (0x0000FFFFU)

 #define CSL_DSS_WB_BA_EXT_0_RESERVED_MASK                                      (0xFFFF0000U)
 #define CSL_DSS_WB_BA_EXT_0_RESERVED_SHIFT                                     (0x00000010U)
 #define CSL_DSS_WB_BA_EXT_0_RESERVED_MAX                                       (0x0000FFFFU)

 /* BA_EXT_1 */

 #define CSL_DSS_WB_BA_EXT_1_BA_EXT_MASK                                        (0x0000FFFFU)
 #define CSL_DSS_WB_BA_EXT_1_BA_EXT_SHIFT                                       (0x00000000U)
 #define CSL_DSS_WB_BA_EXT_1_BA_EXT_MAX                                         (0x0000FFFFU)

 #define CSL_DSS_WB_BA_EXT_1_RESERVED_MASK                                      (0xFFFF0000U)
 #define CSL_DSS_WB_BA_EXT_1_RESERVED_SHIFT                                     (0x00000010U)
 #define CSL_DSS_WB_BA_EXT_1_RESERVED_MAX                                       (0x0000FFFFU)

 /* BA_UV_EXT_0 */

 #define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MASK                                  (0x0000FFFFU)
 #define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MAX                                   (0x0000FFFFU)

 #define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MASK                                   (0xFFFF0000U)
 #define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_SHIFT                                  (0x00000010U)
 #define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MAX                                    (0x0000FFFFU)

 /* BA_UV_EXT_1 */

 #define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MASK                                  (0x0000FFFFU)
 #define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_SHIFT                                 (0x00000000U)
 #define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MAX                                   (0x0000FFFFU)

 #define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MASK                                   (0xFFFF0000U)
 #define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_SHIFT                                  (0x00000010U)
 #define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MAX                                    (0x0000FFFFU)

 /* SECURE */

 #define CSL_DSS_WB_SECURE_SECURE_MASK                                          (0x00000001U)
 #define CSL_DSS_WB_SECURE_SECURE_SHIFT                                         (0x00000000U)
 #define CSL_DSS_WB_SECURE_SECURE_MAX                                           (0x00000001U)

 #define CSL_DSS_WB_SECURE_SECURE_VAL_SECUREDIS                                 (0x0U)
 #define CSL_DSS_WB_SECURE_SECURE_VAL_SECUREEN                                  (0x1U)

 #define CSL_DSS_WB_SECURE_RESERVED_MASK                                        (0xFFFFFFFEU)
 #define CSL_DSS_WB_SECURE_RESERVED_SHIFT                                       (0x00000001U)
 #define CSL_DSS_WB_SECURE_RESERVED_MAX                                         (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : COMMON_S1 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint8_t  Resv_40[40];
     volatile uint32_t DISPC_IRQSTATUS_RAW;       /* DISPC_IRQSTATUS_RAW */
     volatile uint32_t DISPC_IRQSTATUS;           /* DISPC_IRQSTATUS */
     volatile uint32_t DISPC_IRQENABLE_SET;       /* DISPC_IRQENABLE_SET */
     volatile uint32_t DISPC_IRQENABLE_CLR;       /* DISPC_IRQENABLE_CLR */
     volatile uint32_t VID_IRQENABLE_0;           /* VID_IRQENABLE_0 */
     volatile uint32_t VID_IRQENABLE_1;           /* VID_IRQENABLE_1 */
     volatile uint32_t VID_IRQENABLE_2;           /* VID_IRQENABLE_2 */
     volatile uint32_t VID_IRQENABLE_3;           /* VID_IRQENABLE_3 */
     volatile uint32_t VID_IRQSTATUS_0;           /* VID_IRQSTATUS_0 */
     volatile uint32_t VID_IRQSTATUS_1;           /* VID_IRQSTATUS_1 */
     volatile uint32_t VID_IRQSTATUS_2;           /* VID_IRQSTATUS_2 */
     volatile uint32_t VID_IRQSTATUS_3;           /* VID_IRQSTATUS_3 */
     volatile uint32_t VP_IRQENABLE_0;            /* VP_IRQENABLE_0 */
     volatile uint32_t VP_IRQENABLE_1;            /* VP_IRQENABLE_1 */
     volatile uint32_t VP_IRQENABLE_2;            /* VP_IRQENABLE_2 */
     volatile uint32_t VP_IRQENABLE_3;            /* VP_IRQENABLE_3 */
     volatile uint32_t VP_IRQSTATUS_0;            /* VP_IRQSTATUS_0 */
     volatile uint32_t VP_IRQSTATUS_1;            /* VP_IRQSTATUS_1 */
     volatile uint32_t VP_IRQSTATUS_2;            /* VP_IRQSTATUS_2 */
     volatile uint32_t VP_IRQSTATUS_3;            /* VP_IRQSTATUS_3 */
     volatile uint32_t WB_IRQENABLE;              /* WB_IRQENABLE */
     volatile uint32_t WB_IRQSTATUS;              /* WB_IRQSTATUS */
     volatile uint32_t DISPC_IRQ_EOI_FUNC;        /* DISPC_IRQ_EOI_FUNC */
     volatile uint32_t DISPC_IRQ_EOI_SAFETY;      /* DISPC_IRQ_EOI_SAFETY */
     volatile uint32_t DISPC_IRQ_EOI_SECURITY;    /* DISPC_IRQ_EOI_SECURITY */
 } CSL_dss_common_s1Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW                                  (0x00000028U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS                                      (0x0000002CU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET                                  (0x00000030U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR                                  (0x00000034U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0                                      (0x00000038U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1                                      (0x0000003CU)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2                                      (0x00000040U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3                                      (0x00000044U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0                                      (0x00000048U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1                                      (0x0000004CU)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2                                      (0x00000050U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3                                      (0x00000054U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0                                       (0x00000058U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1                                       (0x0000005CU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2                                       (0x00000060U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3                                       (0x00000064U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0                                       (0x00000068U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1                                       (0x0000006CU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2                                       (0x00000070U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3                                       (0x00000074U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE                                         (0x00000078U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS                                         (0x0000007CU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC                                   (0x00000080U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY                                 (0x00000084U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY                               (0x00000088U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* DISPC_IRQSTATUS_RAW */

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK                      (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX                       (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK                     (0x000000F0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX                      (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION             (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT            (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK                      (0x00004000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT                     (0x0000000EU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK                  (0x00008000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT                 (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT         (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK                   (0x00010000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT                  (0x00000010U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT          (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MAX                     (0x00007FFFU)

 /* DISPC_IRQSTATUS */

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MASK                          (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MAX                           (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MASK                         (0x000000F0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_SHIFT                        (0x00000004U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MAX                          (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION                 (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR                    (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MASK                    (0x00001F00U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_SHIFT                   (0x00000008U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MAX                     (0x0000001FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MASK                    (0x00002000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT                   (0x0000000DU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MASK                          (0x00004000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_SHIFT                         (0x0000000EU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK                      (0x00008000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT                     (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR                 (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MASK                       (0x00010000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT                      (0x00000010U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR                  (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MASK                        (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_SHIFT                       (0x00000011U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MAX                         (0x00007FFFU)

 /* DISPC_IRQENABLE_SET */

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK                  (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK                 (0x000000F0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT                (0x00000004U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION         (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE           (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK                  (0x00004000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT                 (0x0000000EU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK              (0x00008000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION      (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE        (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK               (0x00010000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT              (0x00000010U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE         (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MAX                     (0x00007FFFU)

 /* DISPC_IRQENABLE_CLR */

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK                  (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK                 (0x000000F0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT                (0x00000004U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION         (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR            (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK                  (0x00004000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT                 (0x0000000EU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK              (0x00008000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION      (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR         (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK               (0x00010000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT              (0x00000010U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR          (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MAX                     (0x00007FFFU)

 /* VID_IRQENABLE_0 */

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_1 */

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_2 */

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_3 */

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MAX                         (0x07FFFFFFU)

 /* VP_IRQENABLE_0 */

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_1 */

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_2 */

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_3 */

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MAX                          (0x00007FFFU)

 /* WB_IRQENABLE */

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK                (0x00000001U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT               (0x00000000U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED          (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT          (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK               (0x00000002U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT              (0x00000001U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED         (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT         (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MASK                     (0x00000004U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT                    (0x00000002U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK               (0x00000008U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT              (0x00000003U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED         (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT         (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MASK                          (0x00000010U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_SHIFT                         (0x00000004U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MASK                           (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_SHIFT                          (0x00000005U)
 #define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MAX                            (0x07FFFFFFU)

 /* WB_IRQSTATUS */

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK               (0x00000001U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT              (0x00000000U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND         (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND           (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK              (0x00000002U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT             (0x00000001U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND        (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND          (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND        (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND          (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MASK                         (0x00000010U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT                        (0x00000004U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MASK                           (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_SHIFT                          (0x00000005U)
 #define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MAX                            (0x07FFFFFFU)

 /* DISPC_IRQ_EOI_FUNC */

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MASK                          (0x00000001U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI                       (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MASK                     (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT                    (0x00000001U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MAX                      (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SAFETY */

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MASK                        (0x00000001U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT                       (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION                (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI                     (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK                   (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT                  (0x00000001U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX                    (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SECURITY */

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MASK                      (0x00000001U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI                   (0x1U)

 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK                 (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX                  (0x7FFFFFFFU)

 /**************************************************************************
 * Hardware Region  : COMMON_S2 Registers
 **************************************************************************/


 /**************************************************************************
 * Register Overlay Structure
 **************************************************************************/

 typedef struct {
     volatile uint8_t  Resv_40[40];
     volatile uint32_t DISPC_IRQSTATUS_RAW;       /* DISPC_IRQSTATUS_RAW */
     volatile uint32_t DISPC_IRQSTATUS;           /* DISPC_IRQSTATUS */
     volatile uint32_t DISPC_IRQENABLE_SET;       /* DISPC_IRQENABLE_SET */
     volatile uint32_t DISPC_IRQENABLE_CLR;       /* DISPC_IRQENABLE_CLR */
     volatile uint32_t VID_IRQENABLE_0;           /* VID_IRQENABLE_0 */
     volatile uint32_t VID_IRQENABLE_1;           /* VID_IRQENABLE_1 */
     volatile uint32_t VID_IRQENABLE_2;           /* VID_IRQENABLE_2 */
     volatile uint32_t VID_IRQENABLE_3;           /* VID_IRQENABLE_3 */
     volatile uint32_t VID_IRQSTATUS_0;           /* VID_IRQSTATUS_0 */
     volatile uint32_t VID_IRQSTATUS_1;           /* VID_IRQSTATUS_1 */
     volatile uint32_t VID_IRQSTATUS_2;           /* VID_IRQSTATUS_2 */
     volatile uint32_t VID_IRQSTATUS_3;           /* VID_IRQSTATUS_3 */
     volatile uint32_t VP_IRQENABLE_0;            /* VP_IRQENABLE_0 */
     volatile uint32_t VP_IRQENABLE_1;            /* VP_IRQENABLE_1 */
     volatile uint32_t VP_IRQENABLE_2;            /* VP_IRQENABLE_2 */
     volatile uint32_t VP_IRQENABLE_3;            /* VP_IRQENABLE_3 */
     volatile uint32_t VP_IRQSTATUS_0;            /* VP_IRQSTATUS_0 */
     volatile uint32_t VP_IRQSTATUS_1;            /* VP_IRQSTATUS_1 */
     volatile uint32_t VP_IRQSTATUS_2;            /* VP_IRQSTATUS_2 */
     volatile uint32_t VP_IRQSTATUS_3;            /* VP_IRQSTATUS_3 */
     volatile uint32_t WB_IRQENABLE;              /* WB_IRQENABLE */
     volatile uint32_t WB_IRQSTATUS;              /* WB_IRQSTATUS */
     volatile uint32_t DISPC_IRQ_EOI_FUNC;        /* DISPC_IRQ_EOI_FUNC */
     volatile uint32_t DISPC_IRQ_EOI_SAFETY;      /* DISPC_IRQ_EOI_SAFETY */
     volatile uint32_t DISPC_IRQ_EOI_SECURITY;    /* DISPC_IRQ_EOI_SECURITY */
 } CSL_dss_common_s2Regs;


 /**************************************************************************
 * Register Macros
 **************************************************************************/

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW                                  (0x00000028U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS                                      (0x0000002CU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET                                  (0x00000030U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR                                  (0x00000034U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0                                      (0x00000038U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1                                      (0x0000003CU)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2                                      (0x00000040U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3                                      (0x00000044U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0                                      (0x00000048U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1                                      (0x0000004CU)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2                                      (0x00000050U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3                                      (0x00000054U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0                                       (0x00000058U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1                                       (0x0000005CU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2                                       (0x00000060U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3                                       (0x00000064U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0                                       (0x00000068U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1                                       (0x0000006CU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2                                       (0x00000070U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3                                       (0x00000074U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE                                         (0x00000078U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS                                         (0x0000007CU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC                                   (0x00000080U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY                                 (0x00000084U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY                               (0x00000088U)

 /**************************************************************************
 * Field Definition Macros
 **************************************************************************/


 /* DISPC_IRQSTATUS_RAW */

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK                      (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX                       (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK                     (0x000000F0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT                    (0x00000004U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX                      (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION             (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT            (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK                      (0x00004000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT                     (0x0000000EU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT             (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK                  (0x00008000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT                 (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT         (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK                   (0x00010000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT                  (0x00000010U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION           (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT          (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MAX                     (0x00007FFFU)

 /* DISPC_IRQSTATUS */

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MASK                          (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MAX                           (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MASK                         (0x000000F0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_SHIFT                        (0x00000004U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MAX                          (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION                 (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR                    (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MASK                    (0x00001F00U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_SHIFT                   (0x00000008U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MAX                     (0x0000001FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MASK                    (0x00002000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT                   (0x0000000DU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MASK                          (0x00004000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_SHIFT                         (0x0000000EU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR                     (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK                      (0x00008000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT                     (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR                 (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MASK                       (0x00010000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT                      (0x00000010U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION               (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR                  (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MASK                        (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_SHIFT                       (0x00000011U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MAX                         (0x00007FFFU)

 /* DISPC_IRQENABLE_SET */

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK                  (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK                 (0x000000F0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT                (0x00000004U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION         (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE           (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK                  (0x00004000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT                 (0x0000000EU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE            (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK              (0x00008000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION      (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE        (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK               (0x00010000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT              (0x00000010U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE         (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MAX                     (0x00007FFFU)

 /* DISPC_IRQENABLE_CLR */

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK                  (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK                 (0x000000F0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT                (0x00000004U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION         (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR            (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK                (0x00001F00U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT               (0x00000008U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX                 (0x0000001FU)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK                (0x00002000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK                  (0x00004000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT                 (0x0000000EU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION          (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR             (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK              (0x00008000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT             (0x0000000FU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION      (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR         (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK               (0x00010000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT              (0x00000010U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION       (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR          (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MASK                    (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_SHIFT                   (0x00000011U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MAX                     (0x00007FFFU)

 /* VID_IRQENABLE_0 */

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_1 */

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_2 */

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQENABLE_3 */

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK           (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT          (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX            (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED     (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MASK                 (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MAX                  (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK             (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT            (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK          (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT         (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT    (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MAX                         (0x07FFFFFFU)

 /* VID_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK          (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT         (0x00000000U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX           (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND    (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND      (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK                (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT               (0x00000001U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT               (0x00000002U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK            (0x00000008U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT           (0x00000003U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK         (0x00000010U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT        (0x00000004U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND     (0x1U)

 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MASK                        (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_SHIFT                       (0x00000005U)
 #define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MAX                         (0x07FFFFFFU)

 /* VP_IRQENABLE_0 */

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_1 */

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_2 */

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQENABLE_3 */

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK                   (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT                  (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MASK                       (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT                      (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT                 (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT                  (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK        (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT       (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK                    (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT                   (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED              (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK             (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT            (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MASK                  (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT                 (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MAX                   (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK             (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT            (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX              (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED       (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT       (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MASK                        (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_SHIFT                       (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MASK                         (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_SHIFT                        (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED                   (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK                 (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT                (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT           (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_0 */

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_1 */

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_2 */

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MAX                          (0x00007FFFU)

 /* VP_IRQSTATUS_3 */

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK                  (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT                 (0x00000000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK                      (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT                     (0x00000001U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND                (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND                  (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT                 (0x00000002U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX                   (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND            (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND              (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK       (0x00000008U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT      (0x00000003U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK                   (0x00000010U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT                  (0x00000004U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX                    (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND             (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND               (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK            (0x00000020U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT           (0x00000005U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK                 (0x000003C0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT                (0x00000006U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX                  (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND           (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND             (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK            (0x00000400U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT           (0x0000000AU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX             (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND      (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND        (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK                       (0x00000800U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT                      (0x0000000BU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX                        (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND                 (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND                   (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MASK                        (0x00001000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT                       (0x0000000CU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND                  (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND                    (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK                (0x0001E000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT               (0x0000000DU)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX                 (0x0000000FU)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND          (0x0U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND            (0x1U)

 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MASK                         (0xFFFE0000U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_SHIFT                        (0x00000011U)
 #define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MAX                          (0x00007FFFU)

 /* WB_IRQENABLE */

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK                (0x00000001U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT               (0x00000000U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX                 (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED          (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT          (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK               (0x00000002U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT              (0x00000001U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED         (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT         (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MASK                     (0x00000004U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT                    (0x00000002U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MAX                      (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED               (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT               (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK               (0x00000008U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT              (0x00000003U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED         (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT         (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MASK                          (0x00000010U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_SHIFT                         (0x00000004U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED                    (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT                    (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MASK                           (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_SHIFT                          (0x00000005U)
 #define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MAX                            (0x07FFFFFFU)

 /* WB_IRQSTATUS */

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK               (0x00000001U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT              (0x00000000U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX                (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND         (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND           (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK              (0x00000002U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT             (0x00000001U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND        (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND          (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK                    (0x00000004U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT                   (0x00000002U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX                     (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND              (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND                (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK              (0x00000008U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT             (0x00000003U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX               (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND        (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND          (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MASK                         (0x00000010U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT                        (0x00000004U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MAX                          (0x00000001U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND                   (0x0U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND                     (0x1U)

 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MASK                           (0xFFFFFFE0U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_SHIFT                          (0x00000005U)
 #define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MAX                            (0x07FFFFFFU)

 /* DISPC_IRQ_EOI_FUNC */

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MASK                          (0x00000001U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_SHIFT                         (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MAX                           (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION                  (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI                       (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MASK                     (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT                    (0x00000001U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MAX                      (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SAFETY */

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MASK                        (0x00000001U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT                       (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MAX                         (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION                (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI                     (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK                   (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT                  (0x00000001U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX                    (0x7FFFFFFFU)

 /* DISPC_IRQ_EOI_SECURITY */

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MASK                      (0x00000001U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT                     (0x00000000U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MAX                       (0x00000001U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION              (0x0U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI                   (0x1U)

 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK                 (0xFFFFFFFEU)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT                (0x00000001U)
 #define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX                  (0x7FFFFFFFU)

 #ifdef __cplusplus
 }
 #endif
 #endif
CSL_dss_vp4Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:12810

CSL_dss_vid2Regs::ACCUH_1
volatile uint32_t ACCUH_1
Definition: cslr_dss.h:7200

CSL_dss_ovr1Regs::VIRTUALVP
volatile uint32_t VIRTUALVP
Definition: cslr_dss.h:8646

CSL_dss_ovr2Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:9965

CSL_dss_vidl1Regs::PIXEL_INC
volatile uint32_t PIXEL_INC
Definition: cslr_dss.h:3494

CSL_dss_wbRegs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:13942

CSL_dss_vidl1Regs::BA_UV_1
volatile uint32_t BA_UV_1
Definition: cslr_dss.h:3479

CSL_dss_vp3Regs::GAMMA_TABLE_12
volatile uint32_t GAMMA_TABLE_12
Definition: cslr_dss.h:11513

CSL_dss_vidl2Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:4672

CSL_dss_common_mRegs::VID_IRQENABLE_3
volatile uint32_t VID_IRQENABLE_3
Definition: cslr_dss.h:67

CSL_dss_vid2Regs::BA_EXT_1
volatile uint32_t BA_EXT_1
Definition: cslr_dss.h:7245

CSL_dss_vidl2Regs::CLUT_13
volatile uint32_t CLUT_13
Definition: cslr_dss.h:4664

CSL_dss_vidl1Regs::FBDC_ATTRIBUTES
volatile uint32_t FBDC_ATTRIBUTES
Definition: cslr_dss.h:3508

CSL_dss_ovr1Regs::DEFAULT_COLOR
volatile uint32_t DEFAULT_COLOR
Definition: cslr_dss.h:8647

CSL_dss_vidl2Regs::SAFETY_CAPT_SIGNATURE
volatile uint32_t SAFETY_CAPT_SIGNATURE
Definition: cslr_dss.h:4668

CSL_dss_vidl2Regs::BUF_THRESHOLD
volatile uint32_t BUF_THRESHOLD
Definition: cslr_dss.h:4621

CSL_dss_common_s2Regs::VP_IRQENABLE_1
volatile uint32_t VP_IRQENABLE_1
Definition: cslr_dss.h:16173

CSL_dss_vidl2Regs::BA_UV_0
volatile uint32_t BA_UV_0
Definition: cslr_dss.h:4618

CSL_dss_vid1Regs::ACCUH2_1
volatile uint32_t ACCUH2_1
Definition: cslr_dss.h:5756

CSL_dss_vidl1Regs::LUMAKEY
volatile uint32_t LUMAKEY
Definition: cslr_dss.h:3533

CSL_dss_common_s1Regs::WB_IRQENABLE
volatile uint32_t WB_IRQENABLE
Definition: cslr_dss.h:14797

CSL_dss_vp1Regs::GAMMA_TABLE_4
volatile uint32_t GAMMA_TABLE_4
Definition: cslr_dss.h:8865

CSL_dss_common_s1Regs::VP_IRQENABLE_3
volatile uint32_t VP_IRQENABLE_3
Definition: cslr_dss.h:14792

CSL_dss_vp2Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:10171

CSL_dss_common_s2Regs::WB_IRQENABLE
volatile uint32_t WB_IRQENABLE
Definition: cslr_dss.h:16180

CSL_dss_common_s1Regs::VP_IRQENABLE_0
volatile uint32_t VP_IRQENABLE_0
Definition: cslr_dss.h:14789

CSL_dss_vid1Regs::ACCUV_1
volatile uint32_t ACCUV_1
Definition: cslr_dss.h:5758

CSL_dss_common_s2Regs::VID_IRQENABLE_2
volatile uint32_t VID_IRQENABLE_2
Definition: cslr_dss.h:16166

CSL_dss_vp4Regs::DATA_CYCLE_2
volatile uint32_t DATA_CYCLE_2
Definition: cslr_dss.h:12801

CSL_dss_vp4Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:12841

CSL_dss_vid2Regs::BUF_SIZE_STATUS
volatile uint32_t BUF_SIZE_STATUS
Definition: cslr_dss.h:7213

CSL_dss_vid1Regs::CLUT_13
volatile uint32_t CLUT_13
Definition: cslr_dss.h:5823

CSL_dss_vidl2Regs::BUF_SIZE_STATUS
volatile uint32_t BUF_SIZE_STATUS
Definition: cslr_dss.h:4620

CSL_dss_vp4Regs::DSS_OLDI_STATUS
volatile uint32_t DSS_OLDI_STATUS
Definition: cslr_dss.h:12838

CSL_dss_vid2Regs::SAFETY_REF_SIGNATURE
volatile uint32_t SAFETY_REF_SIGNATURE
Definition: cslr_dss.h:7275

CSL_dss_wbRegs::BA_UV_EXT_1
volatile uint32_t BA_UV_EXT_1
Definition: cslr_dss.h:13974

CSL_dss_common_mRegs::DISPC_CLKGATING_DISABLE
volatile uint32_t DISPC_CLKGATING_DISABLE
Definition: cslr_dss.h:94

CSL_dss_vp1Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:8850

CSL_dss_vid2Regs::FIRH
volatile uint32_t FIRH
Definition: cslr_dss.h:7222

CSL_dss_common_s1Regs::DISPC_IRQ_EOI_FUNC
volatile uint32_t DISPC_IRQ_EOI_FUNC
Definition: cslr_dss.h:14799

CSL_dss_vp4Regs::GAMMA_TABLE_14
volatile uint32_t GAMMA_TABLE_14
Definition: cslr_dss.h:12835

CSL_dss_vidl2Regs::TILE
volatile uint32_t TILE
Definition: cslr_dss.h:4646

CSL_dss_ovr1Regs::TRANS_COLOR_MAX
volatile uint32_t TRANS_COLOR_MAX
Definition: cslr_dss.h:8649

CSL_dss_common_s1Regs::VID_IRQENABLE_0
volatile uint32_t VID_IRQENABLE_0
Definition: cslr_dss.h:14781

CSL_dss_vidl1Regs::CLUT_2
volatile uint32_t CLUT_2
Definition: cslr_dss.h:3513

CSL_dss_vid2Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:7220

CSL_dss_vp2Regs::DSS_OLDI_STATUS
volatile uint32_t DSS_OLDI_STATUS
Definition: cslr_dss.h:10198

CSL_dss_vp3Regs::CONTROL
volatile uint32_t CONTROL
Definition: cslr_dss.h:11475

CSL_dss_vp3Regs::GAMMA_TABLE_7
volatile uint32_t GAMMA_TABLE_7
Definition: cslr_dss.h:11508

CSL_dss_common_s1Regs::VID_IRQSTATUS_0
volatile uint32_t VID_IRQSTATUS_0
Definition: cslr_dss.h:14785

CSL_dss_common_s1Regs::VP_IRQENABLE_2
volatile uint32_t VP_IRQENABLE_2
Definition: cslr_dss.h:14791

CSL_dss_vidl2Regs::CLUT_2
volatile uint32_t CLUT_2
Definition: cslr_dss.h:4653

CSL_dss_vid1Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:5773

CSL_dss_common_s2Regs::WB_IRQSTATUS
volatile uint32_t WB_IRQSTATUS
Definition: cslr_dss.h:16181

CSL_dss_common_s0Regs::DISPC_IRQENABLE_SET
volatile uint32_t DISPC_IRQENABLE_SET
Definition: cslr_dss.h:2093

CSL_dss_vid1Regs::PICTURE_SIZE
volatile uint32_t PICTURE_SIZE
Definition: cslr_dss.h:5791

CSL_dss_wbRegs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:13967

CSL_dss_ovr3Regs::DEFAULT_COLOR
volatile uint32_t DEFAULT_COLOR
Definition: cslr_dss.h:11287

CSL_dss_vp4Regs::GAMMA_TABLE_4
volatile uint32_t GAMMA_TABLE_4
Definition: cslr_dss.h:12825

CSL_dss_vp3Regs::GAMMA_TABLE_8
volatile uint32_t GAMMA_TABLE_8
Definition: cslr_dss.h:11509

CSL_dss_wbRegs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:13941

CSL_dss_common_mRegs::DISPC_SECURE_DISABLE
volatile uint32_t DISPC_SECURE_DISABLE
Definition: cslr_dss.h:86

CSL_dss_vidl1Regs::CLUT_11
volatile uint32_t CLUT_11
Definition: cslr_dss.h:3522

CSL_dss_vid2Regs::FBDC_CLEAR_COLOR
volatile uint32_t FBDC_CLEAR_COLOR
Definition: cslr_dss.h:7254

CSL_dss_common_mRegs::DISPC_IRQSTATUS
volatile uint32_t DISPC_IRQSTATUS
Definition: cslr_dss.h:61

CSL_dss_vp3Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:11521

CSL_dss_vid2Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:7277

CSL_dss_vid1Regs::ROW_INC_UV
volatile uint32_t ROW_INC_UV
Definition: cslr_dss.h:5804

CSL_dss_vidl1Regs::GLOBAL_ALPHA
volatile uint32_t GLOBAL_ALPHA
Definition: cslr_dss.h:3490

CSL_dss_vidl2Regs::BA_1
volatile uint32_t BA_1
Definition: cslr_dss.h:4617

CSL_dss_common_mRegs::FBDC_CONSTANT_COLOR_0
volatile uint32_t FBDC_CONSTANT_COLOR_0
Definition: cslr_dss.h:103

CSL_dss_vid1Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:5775

CSL_dss_common_mRegs::DSS_REVISION
volatile uint32_t DSS_REVISION
Definition: cslr_dss.h:55

CSL_dss_vid2Regs::PIPE_GO
volatile uint32_t PIPE_GO
Definition: cslr_dss.h:7282

CSL_dss_wbRegs::MFLAG_THRESHOLD
volatile uint32_t MFLAG_THRESHOLD
Definition: cslr_dss.h:13961

CSL_dss_vp4Regs::GAMMA_TABLE_12
volatile uint32_t GAMMA_TABLE_12
Definition: cslr_dss.h:12833

CSL_dss_common_s2Regs::VID_IRQENABLE_0
volatile uint32_t VID_IRQENABLE_0
Definition: cslr_dss.h:16164

CSL_dss_common_s0Regs
Definition: cslr_dss.h:2089

CSL_dss_vid2Regs::BA_UV_EXT_0
volatile uint32_t BA_UV_EXT_0
Definition: cslr_dss.h:7246

CSL_dss_vp1Regs::GAMMA_TABLE_10
volatile uint32_t GAMMA_TABLE_10
Definition: cslr_dss.h:8871

CSL_dss_ovr4Regs::DEFAULT_COLOR2
volatile uint32_t DEFAULT_COLOR2
Definition: cslr_dss.h:12608

CSL_dss_vid2Regs::CROP
volatile uint32_t CROP
Definition: cslr_dss.h:7280

CSL_dss_vp3Regs::GAMMA_TABLE_2
volatile uint32_t GAMMA_TABLE_2
Definition: cslr_dss.h:11503

CSL_dss_common_mRegs::VP_IRQSTATUS_3
volatile uint32_t VP_IRQSTATUS_3
Definition: cslr_dss.h:79

CSL_dss_vp1Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:8836

CSL_dss_vidl1Regs::PIPE_GO
volatile uint32_t PIPE_GO
Definition: cslr_dss.h:3537

CSL_dss_vid1Regs::BA_UV_1
volatile uint32_t BA_UV_1
Definition: cslr_dss.h:5766

CSL_dss_wbRegs::BA_UV_EXT_0
volatile uint32_t BA_UV_EXT_0
Definition: cslr_dss.h:13973

CSL_dss_common_s0Regs::DISPC_IRQ_EOI_SAFETY
volatile uint32_t DISPC_IRQ_EOI_SAFETY
Definition: cslr_dss.h:2114

CSL_dss_vidl1Regs::BA_0
volatile uint32_t BA_0
Definition: cslr_dss.h:3476

CSL_dss_common_s0Regs::VID_IRQENABLE_1
volatile uint32_t VID_IRQENABLE_1
Definition: cslr_dss.h:2096

CSL_dss_vidl1Regs::CLUT_15
volatile uint32_t CLUT_15
Definition: cslr_dss.h:3526

CSL_dss_common_s1Regs::DISPC_IRQENABLE_SET
volatile uint32_t DISPC_IRQENABLE_SET
Definition: cslr_dss.h:14779

CSL_dss_vidl2Regs::PICTURE_SIZE
volatile uint32_t PICTURE_SIZE
Definition: cslr_dss.h:4633

CSL_dss_wbRegs::ATTRIBUTES2
volatile uint32_t ATTRIBUTES2
Definition: cslr_dss.h:13934

CSL_dss_vid1Regs::CROP
volatile uint32_t CROP
Definition: cslr_dss.h:5834

CSL_dss_vp4Regs::TIMING_H
volatile uint32_t TIMING_H
Definition: cslr_dss.h:12807

CSL_dss_common_s2Regs::VID_IRQSTATUS_0
volatile uint32_t VID_IRQSTATUS_0
Definition: cslr_dss.h:16168

CSL_dss_vid1Regs::SAFETY_CAPT_SIGNATURE
volatile uint32_t SAFETY_CAPT_SIGNATURE
Definition: cslr_dss.h:5827

CSL_dss_vp2Regs::GAMMA_TABLE_7
volatile uint32_t GAMMA_TABLE_7
Definition: cslr_dss.h:10188

CSL_dss_common_mRegs::VID_IRQENABLE_2
volatile uint32_t VID_IRQENABLE_2
Definition: cslr_dss.h:66

CSL_dss_vid1Regs::CLUT_2
volatile uint32_t CLUT_2
Definition: cslr_dss.h:5812

CSL_dss_vidl1Regs::CLUT_3
volatile uint32_t CLUT_3
Definition: cslr_dss.h:3514

CSL_dss_vid2Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:7215

CSL_dss_vid2Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:7217

CSL_dss_vp4Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:12812

CSL_dss_vidl2Regs::MFLAG_THRESHOLD
volatile uint32_t MFLAG_THRESHOLD
Definition: cslr_dss.h:4632

CSL_dss_common_s0Regs::VP_IRQSTATUS_1
volatile uint32_t VP_IRQSTATUS_1
Definition: cslr_dss.h:2108

CSL_dss_wbRegs::ACCUV_1
volatile uint32_t ACCUV_1
Definition: cslr_dss.h:13930

CSL_dss_vid1Regs::PIXEL_INC
volatile uint32_t PIXEL_INC
Definition: cslr_dss.h:5792

CSL_dss_vidl1Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:3485

CSL_dss_vp3Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:11489

CSL_dss_vidl1Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:3483

CSL_dss_common_mRegs::GLOBAL_DMA_THREADSIZESTATUS
volatile uint32_t GLOBAL_DMA_THREADSIZESTATUS
Definition: cslr_dss.h:110

CSL_dss_vid2Regs::FIRV
volatile uint32_t FIRV
Definition: cslr_dss.h:7224

CSL_dss_vp1Regs::GAMMA_TABLE_6
volatile uint32_t GAMMA_TABLE_6
Definition: cslr_dss.h:8867

CSL_dss_vp1Regs::DATA_CYCLE_2
volatile uint32_t DATA_CYCLE_2
Definition: cslr_dss.h:8841

CSL_dss_common_mRegs::FBDC_REVISION_4
volatile uint32_t FBDC_REVISION_4
Definition: cslr_dss.h:99

CSL_dss_vp1Regs::DSS_OLDI_STATUS
volatile uint32_t DSS_OLDI_STATUS
Definition: cslr_dss.h:8878

CSL_dss_vp3Regs::GAMMA_TABLE_10
volatile uint32_t GAMMA_TABLE_10
Definition: cslr_dss.h:11511

CSL_dss_wbRegs::FIRV
volatile uint32_t FIRV
Definition: cslr_dss.h:13950

CSL_dss_wbRegs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:13976

CSL_dss_vp4Regs::GAMMA_TABLE_15
volatile uint32_t GAMMA_TABLE_15
Definition: cslr_dss.h:12836

CSL_dss_vp2Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:10172

CSL_dss_common_mRegs::VP_IRQENABLE_3
volatile uint32_t VP_IRQENABLE_3
Definition: cslr_dss.h:75

CSL_dss_vp1Regs::GAMMA_TABLE_7
volatile uint32_t GAMMA_TABLE_7
Definition: cslr_dss.h:8868

CSL_dss_vid1Regs::BUF_SIZE_STATUS
volatile uint32_t BUF_SIZE_STATUS
Definition: cslr_dss.h:5767

CSL_dss_vp1Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:8853

CSL_dss_vid2Regs::ACCUH_0
volatile uint32_t ACCUH_0
Definition: cslr_dss.h:7199

CSL_dss_vidl2Regs::CLUT_15
volatile uint32_t CLUT_15
Definition: cslr_dss.h:4666

CSL_dss_vp2Regs::GAMMA_TABLE_5
volatile uint32_t GAMMA_TABLE_5
Definition: cslr_dss.h:10186

CSL_dss_vid2Regs::ATTRIBUTES2
volatile uint32_t ATTRIBUTES2
Definition: cslr_dss.h:7208

CSL_dss_vid2Regs::ACCUH2_0
volatile uint32_t ACCUH2_0
Definition: cslr_dss.h:7201

CSL_dss_ovr4Regs
Definition: cslr_dss.h:12604

CSL_dss_vp1Regs::GAMMA_TABLE_2
volatile uint32_t GAMMA_TABLE_2
Definition: cslr_dss.h:8863

CSL_dss_common_mRegs::FBDC_REVISION_5
volatile uint32_t FBDC_REVISION_5
Definition: cslr_dss.h:100

CSL_dss_wbRegs::BA_UV_1
volatile uint32_t BA_UV_1
Definition: cslr_dss.h:13938

CSL_dss_vidl2Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:4622

CSL_dss_vp1Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:8851

CSL_dss_vidl1Regs::MFLAG_THRESHOLD
volatile uint32_t MFLAG_THRESHOLD
Definition: cslr_dss.h:3492

CSL_dss_vid1Regs::BA_EXT_0
volatile uint32_t BA_EXT_0
Definition: cslr_dss.h:5798

CSL_dss_vidl2Regs::LUMAKEY
volatile uint32_t LUMAKEY
Definition: cslr_dss.h:4673

CSL_dss_wbRegs::BA_EXT_0
volatile uint32_t BA_EXT_0
Definition: cslr_dss.h:13971

CSL_dss_wbRegs::BA_0
volatile uint32_t BA_0
Definition: cslr_dss.h:13935

CSL_dss_vp2Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:10170

CSL_dss_vid1Regs::LUMAKEY
volatile uint32_t LUMAKEY
Definition: cslr_dss.h:5832

CSL_dss_vid1Regs::CLUT_3
volatile uint32_t CLUT_3
Definition: cslr_dss.h:5813

CSL_dss_vp2Regs::POL_FREQ
volatile uint32_t POL_FREQ
Definition: cslr_dss.h:10165

CSL_dss_vp1Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:8852

CSL_dss_vp2Regs::GAMMA_TABLE_14
volatile uint32_t GAMMA_TABLE_14
Definition: cslr_dss.h:10195

CSL_dss_vidl2Regs::ROW_INC
volatile uint32_t ROW_INC
Definition: cslr_dss.h:4637

CSL_dss_common_mRegs::DISPC_GLOBAL_MFLAG_ATTRIBUTE
volatile uint32_t DISPC_GLOBAL_MFLAG_ATTRIBUTE
Definition: cslr_dss.h:88

CSL_dss_vidl2Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:4676

CSL_dss_vid2Regs::CLUT_14
volatile uint32_t CLUT_14
Definition: cslr_dss.h:7270

CSL_dss_vid1Regs::CLUT_1
volatile uint32_t CLUT_1
Definition: cslr_dss.h:5811

CSL_dss_common_s1Regs::VID_IRQENABLE_1
volatile uint32_t VID_IRQENABLE_1
Definition: cslr_dss.h:14782

CSL_dss_vp4Regs::GAMMA_TABLE_13
volatile uint32_t GAMMA_TABLE_13
Definition: cslr_dss.h:12834

CSL_dss_vp3Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:11490

CSL_dss_common_mRegs::FBDC_REVISION_2
volatile uint32_t FBDC_REVISION_2
Definition: cslr_dss.h:97

CSL_dss_vid1Regs::BA_EXT_1
volatile uint32_t BA_EXT_1
Definition: cslr_dss.h:5799

CSL_dss_common_s2Regs::VID_IRQSTATUS_1
volatile uint32_t VID_IRQSTATUS_1
Definition: cslr_dss.h:16169

CSL_dss_vp2Regs::TIMING_H
volatile uint32_t TIMING_H
Definition: cslr_dss.h:10167

CSL_dss_vp4Regs::GAMMA_TABLE_8
volatile uint32_t GAMMA_TABLE_8
Definition: cslr_dss.h:12829

CSL_dss_vid2Regs::FIRV2
volatile uint32_t FIRV2
Definition: cslr_dss.h:7225

CSL_dss_vp2Regs::LINE_NUMBER
volatile uint32_t LINE_NUMBER
Definition: cslr_dss.h:10163

CSL_dss_vp3Regs::GAMMA_TABLE_1
volatile uint32_t GAMMA_TABLE_1
Definition: cslr_dss.h:11502

CSL_dss_vid1Regs::FIRV
volatile uint32_t FIRV
Definition: cslr_dss.h:5778

CSL_dss_vid2Regs::ACCUV2_0
volatile uint32_t ACCUV2_0
Definition: cslr_dss.h:7205

CSL_dss_vidl1Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:3487

CSL_dss_vp2Regs::GAMMA_TABLE_3
volatile uint32_t GAMMA_TABLE_3
Definition: cslr_dss.h:10184

CSL_dss_vp2Regs
Definition: cslr_dss.h:10153

CSL_dss_common_s1Regs::DISPC_IRQENABLE_CLR
volatile uint32_t DISPC_IRQENABLE_CLR
Definition: cslr_dss.h:14780

CSL_dss_common_s0Regs::WB_IRQSTATUS
volatile uint32_t WB_IRQSTATUS
Definition: cslr_dss.h:2112

CSL_dss_wbRegs::ACCUV2_0
volatile uint32_t ACCUV2_0
Definition: cslr_dss.h:13931

CSL_dss_vp2Regs::GAMMA_TABLE_6
volatile uint32_t GAMMA_TABLE_6
Definition: cslr_dss.h:10187

CSL_dss_common_s2Regs::VP_IRQENABLE_0
volatile uint32_t VP_IRQENABLE_0
Definition: cslr_dss.h:16172

CSL_dss_vid2Regs::SAFETY_SIZE
volatile uint32_t SAFETY_SIZE
Definition: cslr_dss.h:7276

CSL_dss_wbRegs::ACCUH2_1
volatile uint32_t ACCUH2_1
Definition: cslr_dss.h:13928

CSL_dss_vp4Regs::GAMMA_TABLE_1
volatile uint32_t GAMMA_TABLE_1
Definition: cslr_dss.h:12822

CSL_dss_ovr1Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:8655

CSL_dss_vid2Regs::CLUT_5
volatile uint32_t CLUT_5
Definition: cslr_dss.h:7261

CSL_dss_vp2Regs::DATA_CYCLE_1
volatile uint32_t DATA_CYCLE_1
Definition: cslr_dss.h:10160

CSL_dss_vp1Regs::POL_FREQ
volatile uint32_t POL_FREQ
Definition: cslr_dss.h:8845

CSL_dss_vp1Regs::GAMMA_TABLE_15
volatile uint32_t GAMMA_TABLE_15
Definition: cslr_dss.h:8876

CSL_dss_wbRegs::FIRH
volatile uint32_t FIRH
Definition: cslr_dss.h:13948

CSL_dss_common_s1Regs::DISPC_IRQ_EOI_SAFETY
volatile uint32_t DISPC_IRQ_EOI_SAFETY
Definition: cslr_dss.h:14800

CSL_dss_vidl2Regs::PIXEL_INC
volatile uint32_t PIXEL_INC
Definition: cslr_dss.h:4634

CSL_dss_ovr2Regs::TRANS_COLOR_MAX2
volatile uint32_t TRANS_COLOR_MAX2
Definition: cslr_dss.h:9970

CSL_dss_vidl2Regs::DMA_BUFSIZE
volatile uint32_t DMA_BUFSIZE
Definition: cslr_dss.h:4674

CSL_dss_common_s0Regs::WB_IRQENABLE
volatile uint32_t WB_IRQENABLE
Definition: cslr_dss.h:2111

CSL_dss_vid1Regs
Definition: cslr_dss.h:5752

CSL_dss_ovr4Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:12615

CSL_dss_vp3Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:11499

CSL_dss_vidl2Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:4627

CSL_dss_common_s0Regs::DISPC_IRQ_EOI_SECURITY
volatile uint32_t DISPC_IRQ_EOI_SECURITY
Definition: cslr_dss.h:2115

CSL_dss_vidl2Regs::SAFETY_ATTRIBUTES
volatile uint32_t SAFETY_ATTRIBUTES
Definition: cslr_dss.h:4667

CSL_dss_vid1Regs::BA_0
volatile uint32_t BA_0
Definition: cslr_dss.h:5763

CSL_dss_vid1Regs::BA_UV_EXT_0
volatile uint32_t BA_UV_EXT_0
Definition: cslr_dss.h:5800

CSL_dss_common_s2Regs::VP_IRQENABLE_2
volatile uint32_t VP_IRQENABLE_2
Definition: cslr_dss.h:16174

CSL_dss_vidl2Regs::BA_EXT_1
volatile uint32_t BA_EXT_1
Definition: cslr_dss.h:4640

CSL_dss_common_mRegs::DISPC_GLOBAL_BUFFER
volatile uint32_t DISPC_GLOBAL_BUFFER
Definition: cslr_dss.h:90

CSL_dss_common_s1Regs::VP_IRQENABLE_1
volatile uint32_t VP_IRQENABLE_1
Definition: cslr_dss.h:14790

CSL_dss_vid1Regs::ACCUV_0
volatile uint32_t ACCUV_0
Definition: cslr_dss.h:5757

CSL_dss_vp4Regs::GAMMA_TABLE_2
volatile uint32_t GAMMA_TABLE_2
Definition: cslr_dss.h:12823

CSL_dss_vp2Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:10158

CSL_dss_vidl1Regs::ROW_INC_UV
volatile uint32_t ROW_INC_UV
Definition: cslr_dss.h:3505

CSL_dss_common_s1Regs::VID_IRQSTATUS_2
volatile uint32_t VID_IRQSTATUS_2
Definition: cslr_dss.h:14787

CSL_dss_vid2Regs::ATTRIBUTES
volatile uint32_t ATTRIBUTES
Definition: cslr_dss.h:7207

CSL_dss_vidl1Regs::CLUT_1
volatile uint32_t CLUT_1
Definition: cslr_dss.h:3512

CSL_dss_vp3Regs::GAMMA_TABLE_9
volatile uint32_t GAMMA_TABLE_9
Definition: cslr_dss.h:11510

CSL_dss_common_s2Regs::VID_IRQSTATUS_3
volatile uint32_t VID_IRQSTATUS_3
Definition: cslr_dss.h:16171

CSL_dss_vidl1Regs::SAFETY_SIZE
volatile uint32_t SAFETY_SIZE
Definition: cslr_dss.h:3531

CSL_dss_vid1Regs::ROW_INC
volatile uint32_t ROW_INC
Definition: cslr_dss.h:5795

CSL_dss_vidl1Regs::TILE2
volatile uint32_t TILE2
Definition: cslr_dss.h:3507

CSL_dss_vidl2Regs::BA_EXT_0
volatile uint32_t BA_EXT_0
Definition: cslr_dss.h:4639

CSL_dss_vp4Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:12813

CSL_dss_ovr1Regs
Definition: cslr_dss.h:8644

CSL_dss_vp2Regs::DSS_OLDI_LB
volatile uint32_t DSS_OLDI_LB
Definition: cslr_dss.h:10199

CSL_dss_vidl2Regs::SAFETY_REF_SIGNATURE
volatile uint32_t SAFETY_REF_SIGNATURE
Definition: cslr_dss.h:4670

CSL_dss_vp2Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:10173

CSL_dss_vid1Regs::CLUT_0
volatile uint32_t CLUT_0
Definition: cslr_dss.h:5810

CSL_dss_vidl2Regs::CLUT_3
volatile uint32_t CLUT_3
Definition: cslr_dss.h:4654

CSL_dss_vidl2Regs::CLUT_4
volatile uint32_t CLUT_4
Definition: cslr_dss.h:4655

CSL_dss_vp4Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:12794

CSL_dss_common_s1Regs
Definition: cslr_dss.h:14775

CSL_dss_vidl1Regs::CLUT_14
volatile uint32_t CLUT_14
Definition: cslr_dss.h:3525

CSL_dss_vp4Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:12819

CSL_dss_vp4Regs::GAMMA_TABLE_9
volatile uint32_t GAMMA_TABLE_9
Definition: cslr_dss.h:12830

CSL_dss_common_s0Regs::VP_IRQSTATUS_0
volatile uint32_t VP_IRQSTATUS_0
Definition: cslr_dss.h:2107

CSL_dss_vp4Regs::GAMMA_TABLE_10
volatile uint32_t GAMMA_TABLE_10
Definition: cslr_dss.h:12831

CSL_dss_vid1Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:5835

CSL_dss_common_mRegs::VP_IRQSTATUS_0
volatile uint32_t VP_IRQSTATUS_0
Definition: cslr_dss.h:76

CSL_dss_vid1Regs::SAFETY_ATTRIBUTES
volatile uint32_t SAFETY_ATTRIBUTES
Definition: cslr_dss.h:5826

CSL_dss_vidl2Regs::SAFETY_SIZE
volatile uint32_t SAFETY_SIZE
Definition: cslr_dss.h:4671

CSL_dss_vp3Regs::TIMING_H
volatile uint32_t TIMING_H
Definition: cslr_dss.h:11487

CSL_dss_vidl1Regs::TILE
volatile uint32_t TILE
Definition: cslr_dss.h:3506

CSL_dss_common_s0Regs::VP_IRQENABLE_3
volatile uint32_t VP_IRQENABLE_3
Definition: cslr_dss.h:2106

CSL_dss_common_s1Regs::DISPC_IRQSTATUS_RAW
volatile uint32_t DISPC_IRQSTATUS_RAW
Definition: cslr_dss.h:14777

CSL_dss_common_s1Regs::DISPC_IRQ_EOI_SECURITY
volatile uint32_t DISPC_IRQ_EOI_SECURITY
Definition: cslr_dss.h:14801

CSL_dss_vidl2Regs::CLUT_1
volatile uint32_t CLUT_1
Definition: cslr_dss.h:4652

CSL_dss_common_s0Regs::VP_IRQSTATUS_2
volatile uint32_t VP_IRQSTATUS_2
Definition: cslr_dss.h:2109

CSL_dss_vid1Regs::CLUT_9
volatile uint32_t CLUT_9
Definition: cslr_dss.h:5819

CSL_dss_vid2Regs::CLUT_1
volatile uint32_t CLUT_1
Definition: cslr_dss.h:7257

CSL_dss_vidl1Regs::PICTURE_SIZE
volatile uint32_t PICTURE_SIZE
Definition: cslr_dss.h:3493

CSL_dss_vid1Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:5772

CSL_dss_vp3Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:11493

CSL_dss_common_mRegs::DISPC_CONNECTIONS
volatile uint32_t DISPC_CONNECTIONS
Definition: cslr_dss.h:106

CSL_dss_vp1Regs::DSS_OLDI_CFG
volatile uint32_t DSS_OLDI_CFG
Definition: cslr_dss.h:8877

CSL_dss_common_mRegs::VID_IRQSTATUS_3
volatile uint32_t VID_IRQSTATUS_3
Definition: cslr_dss.h:71

CSL_dss_vid2Regs::FIRH2
volatile uint32_t FIRH2
Definition: cslr_dss.h:7223

CSL_dss_vp4Regs::CONTROL
volatile uint32_t CONTROL
Definition: cslr_dss.h:12795

CSL_dss_common_s1Regs::WB_IRQSTATUS
volatile uint32_t WB_IRQSTATUS
Definition: cslr_dss.h:14798

CSL_dss_wbRegs
Definition: cslr_dss.h:13924

CSL_dss_common_mRegs::DISPC_IRQ_EOI_SECURITY
volatile uint32_t DISPC_IRQ_EOI_SECURITY
Definition: cslr_dss.h:84

CSL_dss_vid1Regs::BUF_THRESHOLD
volatile uint32_t BUF_THRESHOLD
Definition: cslr_dss.h:5768

CSL_dss_common_s2Regs::VP_IRQSTATUS_1
volatile uint32_t VP_IRQSTATUS_1
Definition: cslr_dss.h:16177

CSL_dss_vp3Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:11477

CSL_dss_ovr3Regs::TRANS_COLOR_MIN2
volatile uint32_t TRANS_COLOR_MIN2
Definition: cslr_dss.h:11292

CSL_dss_common_mRegs::VID_IRQSTATUS_0
volatile uint32_t VID_IRQSTATUS_0
Definition: cslr_dss.h:68

CSL_dss_common_s0Regs::VID_IRQENABLE_3
volatile uint32_t VID_IRQENABLE_3
Definition: cslr_dss.h:2098

CSL_dss_ovr1Regs::TRANS_COLOR_MAX2
volatile uint32_t TRANS_COLOR_MAX2
Definition: cslr_dss.h:8650

CSL_dss_vp3Regs
Definition: cslr_dss.h:11473

CSL_dss_ovr2Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:9975

CSL_dss_common_s2Regs::VP_IRQSTATUS_3
volatile uint32_t VP_IRQSTATUS_3
Definition: cslr_dss.h:16179

CSL_dss_vp4Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:12798

CSL_dss_wbRegs::PICTURE_SIZE
volatile uint32_t PICTURE_SIZE
Definition: cslr_dss.h:13962

CSL_dss_wbRegs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:13946

CSL_dss_wbRegs::BA_UV_0
volatile uint32_t BA_UV_0
Definition: cslr_dss.h:13937

CSL_dss_common_s0Regs::VID_IRQSTATUS_0
volatile uint32_t VID_IRQSTATUS_0
Definition: cslr_dss.h:2099

CSL_dss_wbRegs::POSITION
volatile uint32_t POSITION
Definition: cslr_dss.h:13965

CSL_dss_vidl2Regs::ATTRIBUTES
volatile uint32_t ATTRIBUTES
Definition: cslr_dss.h:4614

CSL_dss_vp3Regs::DATA_CYCLE_1
volatile uint32_t DATA_CYCLE_1
Definition: cslr_dss.h:11480

CSL_dss_vp3Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:11492

CSL_dss_vp1Regs::GAMMA_TABLE_11
volatile uint32_t GAMMA_TABLE_11
Definition: cslr_dss.h:8872

CSL_dss_vidl1Regs::CLUT_5
volatile uint32_t CLUT_5
Definition: cslr_dss.h:3516

CSL_dss_common_s2Regs::DISPC_IRQENABLE_CLR
volatile uint32_t DISPC_IRQENABLE_CLR
Definition: cslr_dss.h:16163

CSL_dss_ovr3Regs::TRANS_COLOR_MAX
volatile uint32_t TRANS_COLOR_MAX
Definition: cslr_dss.h:11289

CSL_dss_common_s0Regs::DISPC_IRQENABLE_CLR
volatile uint32_t DISPC_IRQENABLE_CLR
Definition: cslr_dss.h:2094

CSL_dss_vidl1Regs::CLUT_10
volatile uint32_t CLUT_10
Definition: cslr_dss.h:3521

CSL_dss_common_mRegs::DISPC_DBG_STATUS
volatile uint32_t DISPC_DBG_STATUS
Definition: cslr_dss.h:93

CSL_dss_vid1Regs::CLUT_6
volatile uint32_t CLUT_6
Definition: cslr_dss.h:5816

CSL_dss_common_s0Regs::VP_IRQENABLE_1
volatile uint32_t VP_IRQENABLE_1
Definition: cslr_dss.h:2104

CSL_dss_ovr4Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:12605

CSL_dss_vp4Regs::LINE_NUMBER
volatile uint32_t LINE_NUMBER
Definition: cslr_dss.h:12803

CSL_dss_vp4Regs::TIMING_V
volatile uint32_t TIMING_V
Definition: cslr_dss.h:12808

CSL_dss_vp3Regs::GAMMA_TABLE_15
volatile uint32_t GAMMA_TABLE_15
Definition: cslr_dss.h:11516

CSL_dss_vidl1Regs::BA_UV_EXT_0
volatile uint32_t BA_UV_EXT_0
Definition: cslr_dss.h:3501

CSL_dss_vidl1Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:3536

CSL_dss_vid1Regs::SAFETY_REF_SIGNATURE
volatile uint32_t SAFETY_REF_SIGNATURE
Definition: cslr_dss.h:5829

CSL_dss_vid2Regs::CLUT_8
volatile uint32_t CLUT_8
Definition: cslr_dss.h:7264

CSL_dss_vidl2Regs::ROW_INC_UV
volatile uint32_t ROW_INC_UV
Definition: cslr_dss.h:4645

CSL_dss_vidl1Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:3488

CSL_dss_common_mRegs::VID_IRQSTATUS_1
volatile uint32_t VID_IRQSTATUS_1
Definition: cslr_dss.h:69

CSL_dss_vidl1Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:3484

CSL_dss_vid2Regs::CLUT_4
volatile uint32_t CLUT_4
Definition: cslr_dss.h:7260

CSL_dss_vidl1Regs::SAFETY_POSITION
volatile uint32_t SAFETY_POSITION
Definition: cslr_dss.h:3529

CSL_dss_vidl2Regs::BA_UV_EXT_0
volatile uint32_t BA_UV_EXT_0
Definition: cslr_dss.h:4641

CSL_dss_common_mRegs::DISPC_IRQ_EOI_SAFETY
volatile uint32_t DISPC_IRQ_EOI_SAFETY
Definition: cslr_dss.h:83

CSL_dss_common_mRegs::DISPC_GLOBAL_OUTPUT_ENABLE
volatile uint32_t DISPC_GLOBAL_OUTPUT_ENABLE
Definition: cslr_dss.h:89

CSL_dss_vp3Regs::DSS_OLDI_LB
volatile uint32_t DSS_OLDI_LB
Definition: cslr_dss.h:11519

CSL_dss_vid2Regs::ACCUV2_1
volatile uint32_t ACCUV2_1
Definition: cslr_dss.h:7206

CSL_dss_vid2Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:7216

CSL_dss_vidl1Regs::FBDC_CLEAR_COLOR
volatile uint32_t FBDC_CLEAR_COLOR
Definition: cslr_dss.h:3509

CSL_dss_common_mRegs::DSS_CBA_CFG
volatile uint32_t DSS_CBA_CFG
Definition: cslr_dss.h:91

CSL_dss_vp1Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:8881

CSL_dss_vidl2Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:4643

CSL_dss_vid1Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:5831

CSL_dss_vp4Regs::GAMMA_TABLE_0
volatile uint32_t GAMMA_TABLE_0
Definition: cslr_dss.h:12821

CSL_dss_vid2Regs::CLUT_10
volatile uint32_t CLUT_10
Definition: cslr_dss.h:7266

CSL_dss_vidl1Regs::CROP
volatile uint32_t CROP
Definition: cslr_dss.h:3535

CSL_dss_vidl2Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:4624

CSL_dss_vid1Regs::PRELOAD
volatile uint32_t PRELOAD
Definition: cslr_dss.h:5794

CSL_dss_vp1Regs::TIMING_V
volatile uint32_t TIMING_V
Definition: cslr_dss.h:8848

CSL_dss_ovr2Regs::TRANS_COLOR_MIN2
volatile uint32_t TRANS_COLOR_MIN2
Definition: cslr_dss.h:9972

CSL_dss_vp3Regs::SIZE_SCREEN
volatile uint32_t SIZE_SCREEN
Definition: cslr_dss.h:11486

CSL_dss_vid2Regs::FBDC_ATTRIBUTES
volatile uint32_t FBDC_ATTRIBUTES
Definition: cslr_dss.h:7253

CSL_dss_vp3Regs::DSS_OLDI_CFG
volatile uint32_t DSS_OLDI_CFG
Definition: cslr_dss.h:11517

CSL_dss_vid2Regs::ROW_INC
volatile uint32_t ROW_INC
Definition: cslr_dss.h:7241

CSL_dss_vp2Regs::SIZE_SCREEN
volatile uint32_t SIZE_SCREEN
Definition: cslr_dss.h:10166

CSL_dss_vid2Regs::LUMAKEY
volatile uint32_t LUMAKEY
Definition: cslr_dss.h:7278

CSL_dss_ovr4Regs::TRANS_COLOR_MAX2
volatile uint32_t TRANS_COLOR_MAX2
Definition: cslr_dss.h:12610

CSL_dss_common_mRegs::DSS_SYSCONFIG
volatile uint32_t DSS_SYSCONFIG
Definition: cslr_dss.h:56

CSL_dss_vidl2Regs::GLOBAL_ALPHA
volatile uint32_t GLOBAL_ALPHA
Definition: cslr_dss.h:4630

CSL_dss_common_mRegs::WB_IRQENABLE
volatile uint32_t WB_IRQENABLE
Definition: cslr_dss.h:80

CSL_dss_vidl1Regs::BA_UV_0
volatile uint32_t BA_UV_0
Definition: cslr_dss.h:3478

CSL_dss_vp3Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:11476

CSL_dss_vidl1Regs::CLUT_0
volatile uint32_t CLUT_0
Definition: cslr_dss.h:3511

CSL_dss_common_s0Regs::VP_IRQENABLE_2
volatile uint32_t VP_IRQENABLE_2
Definition: cslr_dss.h:2105

CSL_dss_common_s2Regs::VP_IRQSTATUS_0
volatile uint32_t VP_IRQSTATUS_0
Definition: cslr_dss.h:16176

CSL_dss_vp2Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:10154

CSL_dss_wbRegs::ACCUV_0
volatile uint32_t ACCUV_0
Definition: cslr_dss.h:13929

CSL_dss_wbRegs::FIRH2
volatile uint32_t FIRH2
Definition: cslr_dss.h:13949

CSL_dss_vid1Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:5774

CSL_dss_vp2Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:10156

CSL_dss_vp4Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:12796

CSL_dss_vp3Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:11474

CSL_dss_vidl2Regs::PRELOAD
volatile uint32_t PRELOAD
Definition: cslr_dss.h:4636

CSL_dss_vid2Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:7218

CSL_dss_vidl1Regs::SAFETY_ATTRIBUTES
volatile uint32_t SAFETY_ATTRIBUTES
Definition: cslr_dss.h:3527

CSL_dss_vid2Regs::CLUT_13
volatile uint32_t CLUT_13
Definition: cslr_dss.h:7269

CSL_dss_vidl1Regs::BA_EXT_0
volatile uint32_t BA_EXT_0
Definition: cslr_dss.h:3499

CSL_dss_vidl2Regs::FBDC_ATTRIBUTES
volatile uint32_t FBDC_ATTRIBUTES
Definition: cslr_dss.h:4648

CSL_dss_common_mRegs::FBDC_CONSTANT_COLOR_1
volatile uint32_t FBDC_CONSTANT_COLOR_1
Definition: cslr_dss.h:104

CSL_dss_common_s0Regs::VID_IRQENABLE_2
volatile uint32_t VID_IRQENABLE_2
Definition: cslr_dss.h:2097

CSL_dss_common_s1Regs::VP_IRQSTATUS_1
volatile uint32_t VP_IRQSTATUS_1
Definition: cslr_dss.h:14794

CSL_dss_vp3Regs::GAMMA_TABLE_0
volatile uint32_t GAMMA_TABLE_0
Definition: cslr_dss.h:11501

CSL_dss_vp3Regs::DATA_CYCLE_0
volatile uint32_t DATA_CYCLE_0
Definition: cslr_dss.h:11479

CSL_dss_vp1Regs::DSS_OLDI_LB
volatile uint32_t DSS_OLDI_LB
Definition: cslr_dss.h:8879

CSL_dss_vp2Regs::GAMMA_TABLE_4
volatile uint32_t GAMMA_TABLE_4
Definition: cslr_dss.h:10185

CSL_dss_vidl1Regs::BA_UV_EXT_1
volatile uint32_t BA_UV_EXT_1
Definition: cslr_dss.h:3502

CSL_dss_common_s1Regs::VID_IRQENABLE_2
volatile uint32_t VID_IRQENABLE_2
Definition: cslr_dss.h:14783

CSL_dss_ovr2Regs::TRANS_COLOR_MAX
volatile uint32_t TRANS_COLOR_MAX
Definition: cslr_dss.h:9969

CSL_dss_vidl1Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:3486

CSL_dss_vid1Regs::CLUT_10
volatile uint32_t CLUT_10
Definition: cslr_dss.h:5820

CSL_dss_common_mRegs::DISPC_IRQENABLE_CLR
volatile uint32_t DISPC_IRQENABLE_CLR
Definition: cslr_dss.h:63

CSL_dss_vid1Regs::CLUT_15
volatile uint32_t CLUT_15
Definition: cslr_dss.h:5825

CSL_dss_vid1Regs::BA_1
volatile uint32_t BA_1
Definition: cslr_dss.h:5764

CSL_dss_common_s2Regs::VID_IRQENABLE_1
volatile uint32_t VID_IRQENABLE_1
Definition: cslr_dss.h:16165

CSL_dss_common_mRegs::VID_IRQSTATUS_2
volatile uint32_t VID_IRQSTATUS_2
Definition: cslr_dss.h:70

CSL_dss_common_mRegs::VP_IRQENABLE_1
volatile uint32_t VP_IRQENABLE_1
Definition: cslr_dss.h:73

CSL_dss_vp4Regs::GAMMA_TABLE_7
volatile uint32_t GAMMA_TABLE_7
Definition: cslr_dss.h:12828

CSL_dss_vid2Regs::PICTURE_SIZE
volatile uint32_t PICTURE_SIZE
Definition: cslr_dss.h:7237

CSL_dss_vid1Regs::BA_UV_0
volatile uint32_t BA_UV_0
Definition: cslr_dss.h:5765

CSL_dss_vidl2Regs::CLUT_12
volatile uint32_t CLUT_12
Definition: cslr_dss.h:4663

CSL_dss_common_mRegs::VP_IRQENABLE_0
volatile uint32_t VP_IRQENABLE_0
Definition: cslr_dss.h:72

CSL_dss_vid1Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:5771

CSL_dss_vidl2Regs::CLUT_0
volatile uint32_t CLUT_0
Definition: cslr_dss.h:4651

CSL_dss_common_s0Regs::VID_IRQSTATUS_3
volatile uint32_t VID_IRQSTATUS_3
Definition: cslr_dss.h:2102

CSL_dss_ovr2Regs::DEFAULT_COLOR
volatile uint32_t DEFAULT_COLOR
Definition: cslr_dss.h:9967

CSL_dss_vid2Regs::CLUT_9
volatile uint32_t CLUT_9
Definition: cslr_dss.h:7265

CSL_dss_vid1Regs::FIRH2
volatile uint32_t FIRH2
Definition: cslr_dss.h:5777

CSL_dss_ovr4Regs::DEFAULT_COLOR
volatile uint32_t DEFAULT_COLOR
Definition: cslr_dss.h:12607

CSL_dss_vidl2Regs::PIPE_GO
volatile uint32_t PIPE_GO
Definition: cslr_dss.h:4677

CSL_dss_vidl1Regs::CLUT_9
volatile uint32_t CLUT_9
Definition: cslr_dss.h:3520

CSL_dss_vidl1Regs
Definition: cslr_dss.h:3472

CSL_dss_common_mRegs::DISPC_MSS_VP3
volatile uint32_t DISPC_MSS_VP3
Definition: cslr_dss.h:108

CSL_dss_ovr1Regs::TRANS_COLOR_MIN
volatile uint32_t TRANS_COLOR_MIN
Definition: cslr_dss.h:8651

CSL_dss_vp3Regs::GAMMA_TABLE_4
volatile uint32_t GAMMA_TABLE_4
Definition: cslr_dss.h:11505

CSL_dss_vid2Regs::CLUT_15
volatile uint32_t CLUT_15
Definition: cslr_dss.h:7271

CSL_dss_vid2Regs::GLOBAL_ALPHA
volatile uint32_t GLOBAL_ALPHA
Definition: cslr_dss.h:7234

CSL_dss_common_s0Regs::DISPC_IRQSTATUS_RAW
volatile uint32_t DISPC_IRQSTATUS_RAW
Definition: cslr_dss.h:2091

CSL_dss_vid2Regs::BA_UV_0
volatile uint32_t BA_UV_0
Definition: cslr_dss.h:7211

CSL_dss_vid1Regs::GLOBAL_ALPHA
volatile uint32_t GLOBAL_ALPHA
Definition: cslr_dss.h:5788

CSL_dss_common_s0Regs::DISPC_IRQ_EOI_FUNC
volatile uint32_t DISPC_IRQ_EOI_FUNC
Definition: cslr_dss.h:2113

CSL_dss_vid1Regs::ACCUH_1
volatile uint32_t ACCUH_1
Definition: cslr_dss.h:5754

CSL_dss_vp2Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:10157

CSL_dss_common_s0Regs::VID_IRQSTATUS_2
volatile uint32_t VID_IRQSTATUS_2
Definition: cslr_dss.h:2101

CSL_dss_vp2Regs::CONTROL
volatile uint32_t CONTROL
Definition: cslr_dss.h:10155

CSL_dss_vidl2Regs::CLUT_5
volatile uint32_t CLUT_5
Definition: cslr_dss.h:4656

CSL_dss_vid1Regs::TILE
volatile uint32_t TILE
Definition: cslr_dss.h:5805

CSL_dss_wbRegs::ROW_INC
volatile uint32_t ROW_INC
Definition: cslr_dss.h:13969

CSL_dss_common_mRegs::DISPC_IRQSTATUS_RAW
volatile uint32_t DISPC_IRQSTATUS_RAW
Definition: cslr_dss.h:60

CSL_dss_vid1Regs::ACCUH_0
volatile uint32_t ACCUH_0
Definition: cslr_dss.h:5753

CSL_dss_vidl2Regs::ATTRIBUTES2
volatile uint32_t ATTRIBUTES2
Definition: cslr_dss.h:4615

CSL_dss_ovr3Regs
Definition: cslr_dss.h:11284

CSL_dss_ovr2Regs::DEFAULT_COLOR2
volatile uint32_t DEFAULT_COLOR2
Definition: cslr_dss.h:9968

CSL_dss_vidl1Regs::CLUT_6
volatile uint32_t CLUT_6
Definition: cslr_dss.h:3517

CSL_dss_vidl2Regs::CLUT_9
volatile uint32_t CLUT_9
Definition: cslr_dss.h:4660

CSL_dss_vp1Regs::GAMMA_TABLE_14
volatile uint32_t GAMMA_TABLE_14
Definition: cslr_dss.h:8875

CSL_dss_vidl1Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:3503

CSL_dss_common_mRegs::VP_IRQSTATUS_2
volatile uint32_t VP_IRQSTATUS_2
Definition: cslr_dss.h:78

CSL_dss_vid2Regs::CLUT_11
volatile uint32_t CLUT_11
Definition: cslr_dss.h:7267

CSL_dss_vid1Regs::MFLAG_THRESHOLD
volatile uint32_t MFLAG_THRESHOLD
Definition: cslr_dss.h:5790

CSL_dss_common_s2Regs::DISPC_IRQ_EOI_SECURITY
volatile uint32_t DISPC_IRQ_EOI_SECURITY
Definition: cslr_dss.h:16184

CSL_dss_vidl2Regs::BA_UV_1
volatile uint32_t BA_UV_1
Definition: cslr_dss.h:4619

CSL_dss_wbRegs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:13943

CSL_dss_vid1Regs::FIRH
volatile uint32_t FIRH
Definition: cslr_dss.h:5776

CSL_dss_vid2Regs::ACCUV_1
volatile uint32_t ACCUV_1
Definition: cslr_dss.h:7204

CSL_dss_ovr2Regs::TRANS_COLOR_MIN
volatile uint32_t TRANS_COLOR_MIN
Definition: cslr_dss.h:9971

CSL_dss_vp1Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:8849

CSL_dss_vp1Regs::DATA_CYCLE_0
volatile uint32_t DATA_CYCLE_0
Definition: cslr_dss.h:8839

CSL_dss_vid1Regs::FIRV2
volatile uint32_t FIRV2
Definition: cslr_dss.h:5779

CSL_dss_vid1Regs::FBDC_CLEAR_COLOR
volatile uint32_t FBDC_CLEAR_COLOR
Definition: cslr_dss.h:5808

CSL_dss_vidl2Regs::FBDC_CLEAR_COLOR
volatile uint32_t FBDC_CLEAR_COLOR
Definition: cslr_dss.h:4649

CSL_dss_vp2Regs::GAMMA_TABLE_0
volatile uint32_t GAMMA_TABLE_0
Definition: cslr_dss.h:10181

CSL_dss_vid2Regs::ROW_INC_UV
volatile uint32_t ROW_INC_UV
Definition: cslr_dss.h:7250

CSL_dss_vid2Regs::CLUT_12
volatile uint32_t CLUT_12
Definition: cslr_dss.h:7268

CSL_dss_common_s2Regs::DISPC_IRQSTATUS
volatile uint32_t DISPC_IRQSTATUS
Definition: cslr_dss.h:16161

CSL_dss_vidl1Regs::BA_EXT_1
volatile uint32_t BA_EXT_1
Definition: cslr_dss.h:3500

CSL_dss_vid2Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:7248

CSL_dss_common_s2Regs::VP_IRQSTATUS_2
volatile uint32_t VP_IRQSTATUS_2
Definition: cslr_dss.h:16178

CSL_dss_common_s0Regs::VP_IRQSTATUS_3
volatile uint32_t VP_IRQSTATUS_3
Definition: cslr_dss.h:2110

CSL_dss_vp1Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:8838

CSL_dss_vp4Regs::GAMMA_TABLE_5
volatile uint32_t GAMMA_TABLE_5
Definition: cslr_dss.h:12826

CSL_dss_common_mRegs::WB_IRQSTATUS
volatile uint32_t WB_IRQSTATUS
Definition: cslr_dss.h:81

CSL_dss_vid2Regs::ACCUH2_1
volatile uint32_t ACCUH2_1
Definition: cslr_dss.h:7202

CSL_dss_vid1Regs::TILE2
volatile uint32_t TILE2
Definition: cslr_dss.h:5806

CSL_dss_vidl2Regs::CLUT_11
volatile uint32_t CLUT_11
Definition: cslr_dss.h:4662

CSL_dss_wbRegs::SIZE
volatile uint32_t SIZE
Definition: cslr_dss.h:13964

CSL_dss_common_s0Regs::VID_IRQSTATUS_1
volatile uint32_t VID_IRQSTATUS_1
Definition: cslr_dss.h:2100

CSL_dss_vid2Regs::PIXEL_INC
volatile uint32_t PIXEL_INC
Definition: cslr_dss.h:7238

CSL_dss_vid2Regs::BA_0
volatile uint32_t BA_0
Definition: cslr_dss.h:7209

CSL_dss_wbRegs::ATTRIBUTES
volatile uint32_t ATTRIBUTES
Definition: cslr_dss.h:13933

CSL_dss_vp1Regs
Definition: cslr_dss.h:8833

CSL_dss_wbRegs::BUF_SIZE_STATUS
volatile uint32_t BUF_SIZE_STATUS
Definition: cslr_dss.h:13939

CSL_dss_common_mRegs::FBDC_COMMON_CONTROL
volatile uint32_t FBDC_COMMON_CONTROL
Definition: cslr_dss.h:102

CSL_dss_vid1Regs::SIZE
volatile uint32_t SIZE
Definition: cslr_dss.h:5796

CSL_dss_vidl2Regs::CLUT_6
volatile uint32_t CLUT_6
Definition: cslr_dss.h:4657

CSL_dss_common_s2Regs::VP_IRQENABLE_3
volatile uint32_t VP_IRQENABLE_3
Definition: cslr_dss.h:16175

CSL_dss_vp3Regs::GAMMA_TABLE_5
volatile uint32_t GAMMA_TABLE_5
Definition: cslr_dss.h:11506

CSL_dss_common_mRegs::DISPC_IRQENABLE_SET
volatile uint32_t DISPC_IRQENABLE_SET
Definition: cslr_dss.h:62

CSL_dss_vp2Regs::DATA_CYCLE_0
volatile uint32_t DATA_CYCLE_0
Definition: cslr_dss.h:10159

CSL_dss_common_mRegs::FBDC_REVISION_6
volatile uint32_t FBDC_REVISION_6
Definition: cslr_dss.h:101

CSL_dss_vid2Regs::SAFETY_ATTRIBUTES
volatile uint32_t SAFETY_ATTRIBUTES
Definition: cslr_dss.h:7272

CSL_dss_ovr4Regs::TRANS_COLOR_MAX
volatile uint32_t TRANS_COLOR_MAX
Definition: cslr_dss.h:12609

CSL_dss_vp3Regs::DATA_CYCLE_2
volatile uint32_t DATA_CYCLE_2
Definition: cslr_dss.h:11481

CSL_dss_vp2Regs::TIMING_V
volatile uint32_t TIMING_V
Definition: cslr_dss.h:10168

CSL_dss_vidl1Regs::BUF_THRESHOLD
volatile uint32_t BUF_THRESHOLD
Definition: cslr_dss.h:3481

CSL_dss_vp2Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:10201

CSL_dss_wbRegs::BA_1
volatile uint32_t BA_1
Definition: cslr_dss.h:13936

CSL_dss_vp4Regs::DSS_OLDI_CFG
volatile uint32_t DSS_OLDI_CFG
Definition: cslr_dss.h:12837

CSL_dss_ovr4Regs::TRANS_COLOR_MIN2
volatile uint32_t TRANS_COLOR_MIN2
Definition: cslr_dss.h:12612

CSL_dss_vidl1Regs::ROW_INC
volatile uint32_t ROW_INC
Definition: cslr_dss.h:3497

CSL_dss_vid1Regs::CLUT_5
volatile uint32_t CLUT_5
Definition: cslr_dss.h:5815

CSL_dss_vid2Regs::SAFETY_POSITION
volatile uint32_t SAFETY_POSITION
Definition: cslr_dss.h:7274

CSL_dss_vidl1Regs::CLUT_4
volatile uint32_t CLUT_4
Definition: cslr_dss.h:3515

CSL_dss_common_s2Regs::VID_IRQENABLE_3
volatile uint32_t VID_IRQENABLE_3
Definition: cslr_dss.h:16167

CSL_dss_common_s0Regs::VID_IRQENABLE_0
volatile uint32_t VID_IRQENABLE_0
Definition: cslr_dss.h:2095

CSL_dss_vid1Regs::ATTRIBUTES
volatile uint32_t ATTRIBUTES
Definition: cslr_dss.h:5761

CSL_dss_ovr3Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:11295

CSL_dss_wbRegs::ROW_INC_UV
volatile uint32_t ROW_INC_UV
Definition: cslr_dss.h:13970

CSL_dss_vp2Regs::GAMMA_TABLE_10
volatile uint32_t GAMMA_TABLE_10
Definition: cslr_dss.h:10191

CSL_dss_vp4Regs::POL_FREQ
volatile uint32_t POL_FREQ
Definition: cslr_dss.h:12805

CSL_dss_vidl2Regs::TILE2
volatile uint32_t TILE2
Definition: cslr_dss.h:4647

CSL_dss_vp3Regs::GAMMA_TABLE_14
volatile uint32_t GAMMA_TABLE_14
Definition: cslr_dss.h:11515

CSL_dss_vidl2Regs::SAFETY_POSITION
volatile uint32_t SAFETY_POSITION
Definition: cslr_dss.h:4669

CSL_dss_ovr3Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:11285

CSL_dss_vp2Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:10169

CSL_dss_vidl2Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:4628

CSL_dss_vid1Regs::SAFETY_SIZE
volatile uint32_t SAFETY_SIZE
Definition: cslr_dss.h:5830

CSL_dss_wbRegs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:13944

CSL_dss_common_mRegs::VP_IRQSTATUS_1
volatile uint32_t VP_IRQSTATUS_1
Definition: cslr_dss.h:77

CSL_dss_vid2Regs::BA_EXT_0
volatile uint32_t BA_EXT_0
Definition: cslr_dss.h:7244

CSL_dss_vp4Regs::DSS_OLDI_LB
volatile uint32_t DSS_OLDI_LB
Definition: cslr_dss.h:12839

CSL_dss_vp1Regs::CONTROL
volatile uint32_t CONTROL
Definition: cslr_dss.h:8835

CSL_dss_common_s1Regs::VID_IRQSTATUS_1
volatile uint32_t VID_IRQSTATUS_1
Definition: cslr_dss.h:14786

CSL_dss_vid2Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:7219

CSL_dss_vp2Regs::DATA_CYCLE_2
volatile uint32_t DATA_CYCLE_2
Definition: cslr_dss.h:10161

CSL_dss_common_s0Regs::VP_IRQENABLE_0
volatile uint32_t VP_IRQENABLE_0
Definition: cslr_dss.h:2103

CSL_dss_wbRegs::ACCUH_1
volatile uint32_t ACCUH_1
Definition: cslr_dss.h:13926

CSL_dss_common_mRegs::DSS_SYSSTATUS
volatile uint32_t DSS_SYSSTATUS
Definition: cslr_dss.h:58

CSL_dss_vid1Regs::SAFETY_POSITION
volatile uint32_t SAFETY_POSITION
Definition: cslr_dss.h:5828

CSL_dss_vp1Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:8837

CSL_dss_vidl2Regs::CLUT_14
volatile uint32_t CLUT_14
Definition: cslr_dss.h:4665

CSL_dss_vid2Regs::TILE
volatile uint32_t TILE
Definition: cslr_dss.h:7251

CSL_dss_vp3Regs::CSC_COEF2
volatile uint32_t CSC_COEF2
Definition: cslr_dss.h:11478

CSL_dss_common_mRegs::GLOBAL_DMA_THREADSIZE
volatile uint32_t GLOBAL_DMA_THREADSIZE
Definition: cslr_dss.h:109

CSL_dss_vid1Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:5769

CSL_dss_vidl2Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:4625

CSL_dss_vid1Regs::CLUT_8
volatile uint32_t CLUT_8
Definition: cslr_dss.h:5818

CSL_dss_vp1Regs::GAMMA_TABLE_0
volatile uint32_t GAMMA_TABLE_0
Definition: cslr_dss.h:8861

CSL_dss_vidl2Regs::CLUT_7
volatile uint32_t CLUT_7
Definition: cslr_dss.h:4658

CSL_dss_vp2Regs::GAMMA_TABLE_15
volatile uint32_t GAMMA_TABLE_15
Definition: cslr_dss.h:10196

CSL_dss_vidl1Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:3532

CSL_dss_vid1Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:5770

CSL_dss_ovr1Regs::TRANS_COLOR_MIN2
volatile uint32_t TRANS_COLOR_MIN2
Definition: cslr_dss.h:8652

CSL_dss_vid1Regs::ACCUH2_0
volatile uint32_t ACCUH2_0
Definition: cslr_dss.h:5755

CSL_dss_common_s2Regs::DISPC_IRQ_EOI_FUNC
volatile uint32_t DISPC_IRQ_EOI_FUNC
Definition: cslr_dss.h:16182

CSL_dss_vidl2Regs::BA_0
volatile uint32_t BA_0
Definition: cslr_dss.h:4616

CSL_dss_vp1Regs::GAMMA_TABLE_1
volatile uint32_t GAMMA_TABLE_1
Definition: cslr_dss.h:8862

CSL_dss_vid1Regs::CLUT_14
volatile uint32_t CLUT_14
Definition: cslr_dss.h:5824

CSL_dss_vp1Regs::GAMMA_TABLE_9
volatile uint32_t GAMMA_TABLE_9
Definition: cslr_dss.h:8870

CSL_dss_vid2Regs::TILE2
volatile uint32_t TILE2
Definition: cslr_dss.h:7252

CSL_dss_vid2Regs::BUF_THRESHOLD
volatile uint32_t BUF_THRESHOLD
Definition: cslr_dss.h:7214

CSL_dss_vidl1Regs::CLUT_8
volatile uint32_t CLUT_8
Definition: cslr_dss.h:3519

CSL_dss_wbRegs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:13947

CSL_dss_vid2Regs::SAFETY_CAPT_SIGNATURE
volatile uint32_t SAFETY_CAPT_SIGNATURE
Definition: cslr_dss.h:7273

CSL_dss_common_s1Regs::VID_IRQENABLE_3
volatile uint32_t VID_IRQENABLE_3
Definition: cslr_dss.h:14784

CSL_dss_vp3Regs::GAMMA_TABLE_13
volatile uint32_t GAMMA_TABLE_13
Definition: cslr_dss.h:11514

CSL_dss_common_mRegs::FBDC_REVISION_3
volatile uint32_t FBDC_REVISION_3
Definition: cslr_dss.h:98

CSL_dss_vp2Regs::GAMMA_TABLE_12
volatile uint32_t GAMMA_TABLE_12
Definition: cslr_dss.h:10193

CSL_dss_vid2Regs::MFLAG_THRESHOLD
volatile uint32_t MFLAG_THRESHOLD
Definition: cslr_dss.h:7236

CSL_dss_common_mRegs
Definition: cslr_dss.h:53

CSL_dss_common_mRegs::GLOBAL_GOBITMODE
volatile uint32_t GLOBAL_GOBITMODE
Definition: cslr_dss.h:111

CSL_dss_vp2Regs::GAMMA_TABLE_11
volatile uint32_t GAMMA_TABLE_11
Definition: cslr_dss.h:10192

CSL_dss_vp4Regs::SIZE_SCREEN
volatile uint32_t SIZE_SCREEN
Definition: cslr_dss.h:12806

CSL_dss_wbRegs::BA_EXT_1
volatile uint32_t BA_EXT_1
Definition: cslr_dss.h:13972

CSL_dss_common_s1Regs::VP_IRQSTATUS_2
volatile uint32_t VP_IRQSTATUS_2
Definition: cslr_dss.h:14795

CSL_dss_common_s2Regs::DISPC_IRQENABLE_SET
volatile uint32_t DISPC_IRQENABLE_SET
Definition: cslr_dss.h:16162

CSL_dss_common_mRegs::VID_IRQENABLE_1
volatile uint32_t VID_IRQENABLE_1
Definition: cslr_dss.h:65

CSL_dss_vp3Regs::GAMMA_TABLE_3
volatile uint32_t GAMMA_TABLE_3
Definition: cslr_dss.h:11504

CSL_dss_vid1Regs::ACCUV2_0
volatile uint32_t ACCUV2_0
Definition: cslr_dss.h:5759

CSL_dss_vp3Regs::TIMING_V
volatile uint32_t TIMING_V
Definition: cslr_dss.h:11488

CSL_dss_common_mRegs::DISPC_MSS_VP1
volatile uint32_t DISPC_MSS_VP1
Definition: cslr_dss.h:107

CSL_dss_vp4Regs::GAMMA_TABLE_6
volatile uint32_t GAMMA_TABLE_6
Definition: cslr_dss.h:12827

CSL_dss_vp1Regs::GAMMA_TABLE_12
volatile uint32_t GAMMA_TABLE_12
Definition: cslr_dss.h:8873

CSL_dss_vid1Regs::BA_UV_EXT_1
volatile uint32_t BA_UV_EXT_1
Definition: cslr_dss.h:5801

CSL_dss_vp1Regs::DATA_CYCLE_1
volatile uint32_t DATA_CYCLE_1
Definition: cslr_dss.h:8840

CSL_dss_wbRegs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:13945

CSL_dss_vid1Regs::FBDC_ATTRIBUTES
volatile uint32_t FBDC_ATTRIBUTES
Definition: cslr_dss.h:5807

CSL_dss_vp2Regs::GAMMA_TABLE_1
volatile uint32_t GAMMA_TABLE_1
Definition: cslr_dss.h:10182

CSL_dss_vidl1Regs::CLUT_13
volatile uint32_t CLUT_13
Definition: cslr_dss.h:3524

CSL_dss_vp1Regs::LINE_NUMBER
volatile uint32_t LINE_NUMBER
Definition: cslr_dss.h:8843

CSL_dss_vp4Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:12811

CSL_dss_vid2Regs::BA_UV_EXT_1
volatile uint32_t BA_UV_EXT_1
Definition: cslr_dss.h:7247

CSL_dss_ovr3Regs::TRANS_COLOR_MAX2
volatile uint32_t TRANS_COLOR_MAX2
Definition: cslr_dss.h:11290

CSL_dss_common_s1Regs::DISPC_IRQSTATUS
volatile uint32_t DISPC_IRQSTATUS
Definition: cslr_dss.h:14778

CSL_dss_vidl2Regs::BA_UV_EXT_1
volatile uint32_t BA_UV_EXT_1
Definition: cslr_dss.h:4642

CSL_dss_vp1Regs::GAMMA_TABLE_3
volatile uint32_t GAMMA_TABLE_3
Definition: cslr_dss.h:8864

CSL_dss_vp3Regs::POL_FREQ
volatile uint32_t POL_FREQ
Definition: cslr_dss.h:11485

CSL_dss_ovr4Regs::VIRTUALVP
volatile uint32_t VIRTUALVP
Definition: cslr_dss.h:12606

CSL_dss_vid2Regs::SECURE
volatile uint32_t SECURE
Definition: cslr_dss.h:7281

CSL_dss_vid2Regs::CLUT_7
volatile uint32_t CLUT_7
Definition: cslr_dss.h:7263

CSL_dss_vp1Regs::GAMMA_TABLE_8
volatile uint32_t GAMMA_TABLE_8
Definition: cslr_dss.h:8869

CSL_dss_vid2Regs
Definition: cslr_dss.h:7198

CSL_dss_vidl1Regs::ATTRIBUTES2
volatile uint32_t ATTRIBUTES2
Definition: cslr_dss.h:3475

CSL_dss_vid1Regs::PIPE_GO
volatile uint32_t PIPE_GO
Definition: cslr_dss.h:5836

CSL_dss_vidl2Regs::CSC_COEF4
volatile uint32_t CSC_COEF4
Definition: cslr_dss.h:4626

CSL_dss_vidl1Regs::CSC_COEF0
volatile uint32_t CSC_COEF0
Definition: cslr_dss.h:3482

CSL_dss_vp2Regs::GAMMA_TABLE_13
volatile uint32_t GAMMA_TABLE_13
Definition: cslr_dss.h:10194

CSL_dss_vp1Regs::SIZE_SCREEN
volatile uint32_t SIZE_SCREEN
Definition: cslr_dss.h:8846

CSL_dss_vid2Regs::CLUT_3
volatile uint32_t CLUT_3
Definition: cslr_dss.h:7259

CSL_dss_vid2Regs::CSC_COEF6
volatile uint32_t CSC_COEF6
Definition: cslr_dss.h:7221

CSL_dss_vidl1Regs::BUF_SIZE_STATUS
volatile uint32_t BUF_SIZE_STATUS
Definition: cslr_dss.h:3480

CSL_dss_vp1Regs::GAMMA_TABLE_13
volatile uint32_t GAMMA_TABLE_13
Definition: cslr_dss.h:8874

CSL_dss_vidl1Regs::SAFETY_CAPT_SIGNATURE
volatile uint32_t SAFETY_CAPT_SIGNATURE
Definition: cslr_dss.h:3528

CSL_dss_vid1Regs::CLUT_7
volatile uint32_t CLUT_7
Definition: cslr_dss.h:5817

CSL_dss_vid1Regs::ATTRIBUTES2
volatile uint32_t ATTRIBUTES2
Definition: cslr_dss.h:5762

CSL_dss_vid2Regs::CLUT_2
volatile uint32_t CLUT_2
Definition: cslr_dss.h:7258

CSL_dss_common_mRegs::VID_IRQENABLE_0
volatile uint32_t VID_IRQENABLE_0
Definition: cslr_dss.h:64

CSL_dss_vidl1Regs::CLUT_12
volatile uint32_t CLUT_12
Definition: cslr_dss.h:3523

CSL_dss_common_mRegs::FBDC_REVISION_1
volatile uint32_t FBDC_REVISION_1
Definition: cslr_dss.h:96

CSL_dss_vp4Regs::GAMMA_TABLE_11
volatile uint32_t GAMMA_TABLE_11
Definition: cslr_dss.h:12832

CSL_dss_vid2Regs::CLUT_0
volatile uint32_t CLUT_0
Definition: cslr_dss.h:7256

CSL_dss_vp2Regs::DSS_OLDI_CFG
volatile uint32_t DSS_OLDI_CFG
Definition: cslr_dss.h:10197

CSL_dss_vidl1Regs::SAFETY_REF_SIGNATURE
volatile uint32_t SAFETY_REF_SIGNATURE
Definition: cslr_dss.h:3530

CSL_dss_ovr1Regs::DEFAULT_COLOR2
volatile uint32_t DEFAULT_COLOR2
Definition: cslr_dss.h:8648

CSL_dss_vp2Regs::GAMMA_TABLE_2
volatile uint32_t GAMMA_TABLE_2
Definition: cslr_dss.h:10183

CSL_dss_common_mRegs::DISPC_DBG_CONTROL
volatile uint32_t DISPC_DBG_CONTROL
Definition: cslr_dss.h:92

CSL_dss_vidl1Regs::CLUT_7
volatile uint32_t CLUT_7
Definition: cslr_dss.h:3518

CSL_dss_ovr3Regs::VIRTUALVP
volatile uint32_t VIRTUALVP
Definition: cslr_dss.h:11286

CSL_dss_vp3Regs::DSS_OLDI_STATUS
volatile uint32_t DSS_OLDI_STATUS
Definition: cslr_dss.h:11518

CSL_dss_vidl2Regs::CLUT_10
volatile uint32_t CLUT_10
Definition: cslr_dss.h:4661

CSL_dss_ovr2Regs
Definition: cslr_dss.h:9964

CSL_dss_vp4Regs::DATA_CYCLE_0
volatile uint32_t DATA_CYCLE_0
Definition: cslr_dss.h:12799

CSL_dss_ovr4Regs::TRANS_COLOR_MIN
volatile uint32_t TRANS_COLOR_MIN
Definition: cslr_dss.h:12611

CSL_dss_vid2Regs::SIZE
volatile uint32_t SIZE
Definition: cslr_dss.h:7242

CSL_dss_vid2Regs::CLUT_6
volatile uint32_t CLUT_6
Definition: cslr_dss.h:7262

CSL_dss_vid2Regs::DMA_BUFSIZE
volatile uint32_t DMA_BUFSIZE
Definition: cslr_dss.h:7279

CSL_dss_common_s0Regs::DISPC_IRQSTATUS
volatile uint32_t DISPC_IRQSTATUS
Definition: cslr_dss.h:2092

CSL_dss_ovr3Regs::TRANS_COLOR_MIN
volatile uint32_t TRANS_COLOR_MIN
Definition: cslr_dss.h:11291

CSL_dss_wbRegs::ACCUH_0
volatile uint32_t ACCUH_0
Definition: cslr_dss.h:13925

CSL_dss_vp2Regs::GAMMA_TABLE_8
volatile uint32_t GAMMA_TABLE_8
Definition: cslr_dss.h:10189

CSL_dss_vid1Regs::CSC_COEF7
volatile uint32_t CSC_COEF7
Definition: cslr_dss.h:5802

CSL_dss_vidl2Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:4623

CSL_dss_vp3Regs::GAMMA_TABLE_6
volatile uint32_t GAMMA_TABLE_6
Definition: cslr_dss.h:11507

CSL_dss_common_s2Regs::DISPC_IRQ_EOI_SAFETY
volatile uint32_t DISPC_IRQ_EOI_SAFETY
Definition: cslr_dss.h:16183

CSL_dss_common_s2Regs
Definition: cslr_dss.h:16158

CSL_dss_common_s1Regs::VP_IRQSTATUS_0
volatile uint32_t VP_IRQSTATUS_0
Definition: cslr_dss.h:14793

CSL_dss_vid2Regs::PRELOAD
volatile uint32_t PRELOAD
Definition: cslr_dss.h:7240

CSL_dss_common_mRegs::DISPC_IRQ_EOI_FUNC
volatile uint32_t DISPC_IRQ_EOI_FUNC
Definition: cslr_dss.h:82

CSL_dss_vidl1Regs::ATTRIBUTES
volatile uint32_t ATTRIBUTES
Definition: cslr_dss.h:3474

CSL_dss_vp4Regs::CSC_COEF1
volatile uint32_t CSC_COEF1
Definition: cslr_dss.h:12797

CSL_dss_vp1Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:8834

CSL_dss_vid2Regs::ACCUV_0
volatile uint32_t ACCUV_0
Definition: cslr_dss.h:7203

CSL_dss_vidl1Regs::BA_1
volatile uint32_t BA_1
Definition: cslr_dss.h:3477

CSL_dss_vidl2Regs::CLUT_8
volatile uint32_t CLUT_8
Definition: cslr_dss.h:4659

CSL_dss_vp4Regs::GAMMA_TABLE_3
volatile uint32_t GAMMA_TABLE_3
Definition: cslr_dss.h:12824

CSL_dss_vid2Regs::BA_1
volatile uint32_t BA_1
Definition: cslr_dss.h:7210

CSL_dss_vidl1Regs::PRELOAD
volatile uint32_t PRELOAD
Definition: cslr_dss.h:3496

CSL_dss_vp3Regs::CSC_COEF5
volatile uint32_t CSC_COEF5
Definition: cslr_dss.h:11491

CSL_dss_wbRegs::FIRV2
volatile uint32_t FIRV2
Definition: cslr_dss.h:13951

CSL_dss_vp4Regs::CSC_COEF3
volatile uint32_t CSC_COEF3
Definition: cslr_dss.h:12809

CSL_dss_common_s1Regs::VID_IRQSTATUS_3
volatile uint32_t VID_IRQSTATUS_3
Definition: cslr_dss.h:14788

CSL_dss_common_mRegs::VP_IRQENABLE_2
volatile uint32_t VP_IRQENABLE_2
Definition: cslr_dss.h:74

CSL_dss_vp1Regs::TIMING_H
volatile uint32_t TIMING_H
Definition: cslr_dss.h:8847

CSL_dss_vid1Regs::DMA_BUFSIZE
volatile uint32_t DMA_BUFSIZE
Definition: cslr_dss.h:5833

CSL_dss_vid2Regs::BA_UV_1
volatile uint32_t BA_UV_1
Definition: cslr_dss.h:7212

CSL_dss_common_s2Regs::VID_IRQSTATUS_2
volatile uint32_t VID_IRQSTATUS_2
Definition: cslr_dss.h:16170

CSL_dss_vp1Regs::GAMMA_TABLE_5
volatile uint32_t GAMMA_TABLE_5
Definition: cslr_dss.h:8866

CSL_dss_vp3Regs::GAMMA_TABLE_11
volatile uint32_t GAMMA_TABLE_11
Definition: cslr_dss.h:11512

CSL_dss_vp1Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:8859

CSL_dss_vp4Regs::DATA_CYCLE_1
volatile uint32_t DATA_CYCLE_1
Definition: cslr_dss.h:12800

CSL_dss_vp2Regs::SAFETY_LFSR_SEED
volatile uint32_t SAFETY_LFSR_SEED
Definition: cslr_dss.h:10179

CSL_dss_common_s2Regs::DISPC_IRQSTATUS_RAW
volatile uint32_t DISPC_IRQSTATUS_RAW
Definition: cslr_dss.h:16160

CSL_dss_wbRegs::BUF_THRESHOLD
volatile uint32_t BUF_THRESHOLD
Definition: cslr_dss.h:13940

CSL_dss_vidl2Regs
Definition: cslr_dss.h:4612

CSL_dss_vid1Regs::CLUT_12
volatile uint32_t CLUT_12
Definition: cslr_dss.h:5822

CSL_dss_ovr2Regs::VIRTUALVP
volatile uint32_t VIRTUALVP
Definition: cslr_dss.h:9966

CSL_dss_vid1Regs::ACCUV2_1
volatile uint32_t ACCUV2_1
Definition: cslr_dss.h:5760

CSL_dss_vid1Regs::CLUT_11
volatile uint32_t CLUT_11
Definition: cslr_dss.h:5821

CSL_dss_vp3Regs::LINE_NUMBER
volatile uint32_t LINE_NUMBER
Definition: cslr_dss.h:11483

CSL_dss_vp4Regs
Definition: cslr_dss.h:12793

CSL_dss_ovr3Regs::DEFAULT_COLOR2
volatile uint32_t DEFAULT_COLOR2
Definition: cslr_dss.h:11288

CSL_dss_vid1Regs::CLUT_4
volatile uint32_t CLUT_4
Definition: cslr_dss.h:5814

CSL_dss_wbRegs::ACCUV2_1
volatile uint32_t ACCUV2_1
Definition: cslr_dss.h:13932

CSL_dss_wbRegs::ACCUH2_0
volatile uint32_t ACCUH2_0
Definition: cslr_dss.h:13927

CSL_dss_vp2Regs::GAMMA_TABLE_9
volatile uint32_t GAMMA_TABLE_9
Definition: cslr_dss.h:10190

CSL_dss_common_s1Regs::VP_IRQSTATUS_3
volatile uint32_t VP_IRQSTATUS_3
Definition: cslr_dss.h:14796

CSL_dss_ovr1Regs::CONFIG
volatile uint32_t CONFIG
Definition: cslr_dss.h:8645

CSL_dss_vidl2Regs::CROP
volatile uint32_t CROP
Definition: cslr_dss.h:4675

CSL_dss_vidl1Regs::DMA_BUFSIZE
volatile uint32_t DMA_BUFSIZE
Definition: cslr_dss.h:3534